Section 17 I2C Bus Interface 2 (IIC2)
Initial
Bit
Bit Name Value
R/W
Description
1
AAS
0
R/W
Slave Address Recognition Flag
In slave receive mode, this flag is set to 1 if the first frame
following a start condition matches bits SVA6 to SVA0 in
SAR.
[Setting conditions]
•
When the slave address is detected in slave receive
mode
•
When the general call address is detected in slave
receive mode.
[Clearing condition]
When 0 is written in AAS after reading AAS=1
•
0
ADZ
0
R/W
General Call Address Recognition Flag
This bit is valid in I2C bus format slave receive mode.
[Setting condition]
•
When the general call address is detected in slave
receive mode
[Clearing condition]
When 0 is written in ADZ after reading ADZ=1
•
17.3.6
Slave Address Register (SAR)
SAR selects the communication format and sets the slave address. When the chip is in slave mode
with the I2C bus format, if the upper 7 bits of SAR match the upper 7 bits of the first frame
received after a start condition, the chip operates as the slave device.
Initial
Bit
Bit Name Value
R/W
Description
7 to 1 SVA6 to
SVA0
All 0
R/W
Slave Address 6 to 0
These bits set a unique address in bits SVA6 to SVA0,
differing form the addresses of other slave devices
connected to the I2C bus.
0
FS
0
R/W
Format Select
0: I2C bus format is selected.
1: Clock synchronous serial format is selected.
Rev. 3.00 Sep. 10, 2007 Page 343 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
