Section 17 I2C Bus Interface 2 (IIC2)
Initial
Bit
Bit Name Value
R/W
Description
6
TEND
0
R/W
Transmit End
[Setting conditions]
•
When the ninth clock of SCL rises with the I2C bus
format while the TDRE flag is 1
•
When the final bit of transmit frame is sent with the
clock synchronous serial format
[Clearing conditions]
•
•
When 0 is written in TEND after reading TEND = 1
When data is written to ICDRT with an instruction
5
RDRF
0
R/W
Receive Data Register Full
[Setting condition]
•
When a receive data is transferred from ICDRS to
ICDRR
[Clearing conditions]
•
•
When 0 is written in RDRF after reading RDRF = 1
When ICDRR is read with an instruction
4
NACKF
0
R/W
No Acknowledge Detection Flag
[Setting condition]
•
When no acknowledge is detected from the receive
device in transmission while the ACKE bit in ICIER is
1
[Clearing condition]
•
When 0 is written in NACKF after reading NACKF = 1
Rev. 3.00 Sep. 10, 2007 Page 341 of 528
REJ09B0216-0300
RENESAS [ RENESAS TECHNOLOGY CORP ]
