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HD64F36077G 参数 Datasheet PDF下载

HD64F36077G图片预览
型号: HD64F36077G
PDF下载: 下载PDF文件 查看货源
内容描述: 旧公司名称在产品目录等资料 [Old Company Name in Catalogs and Other Documents]
分类和应用:
文件页数/大小: 566 页 / 3220 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 12 Timer V  
Initial  
Bit Name Value  
Bit  
R/W  
Description  
6
CMFA  
OVF  
0
0
1
R/W  
Compare Match Flag A  
Setting condition:  
When the TCNTV value matches the TCORA value  
Clearing condition:  
After reading CMFA = 1, cleared by writing 0 to CMFA  
Timer Overflow Flag  
5
R/W  
Setting condition:  
When TCNTV overflows from H'FF to H'00  
Clearing condition:  
After reading OVF = 1, cleared by writing 0 to OVF  
Reserved  
4
This bit is always read as 1.  
Output Select 3 and 2  
3
2
OS3  
OS2  
0
0
R/W  
R/W  
These bits select an output method for the TMOV pin by  
the compare match of TCORB and TCNTV.  
00: No change  
01: 0 output  
10: 1 output  
11: Output toggles  
Output Select 1 and 0  
1
0
OS1  
OS0  
0
0
R/W  
R/W  
These bits select an output method for the TMOV pin by  
the compare match of TCORA and TCNTV.  
00: No change  
01: 0 output  
10: 1 output  
11: Output toggles  
OS3 and OS2 select the output level for compare match B. OS1 and OS0 select the output level  
for compare match A. The two output levels can be controlled independently. After a reset, the  
timer output is 0 until the first compare match.  
Rev. 3.00 Sep. 10, 2007 Page 190 of 528  
REJ09B0216-0300  
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