6.1.4
Register Configuration
The INTC has the 12 registers listed in table 6.2.
Table 6.2 INTC Registers
Access
Size
1
*
Name
Abbr.
ICR0
ICR1
R/W
R/W
R/W
Initial Value
Address
2
*
Interrupt control register 0
Interrupt control register 1
H'FFFFFEE0
16
16
H'0000
H'0000
H'0000
H'04000010
(H'A4000010)
3
*
Interrupt control register 2
ICR2
R/W
H'04000012
(H'A4000012)
16
16
3
*
PINT interrupt enable register
PINTER R/W
H'04000014
(H'A4000014)
3
*
Interrupt priority register A
Interrupt priority register B
Interrupt priority register C
IPRA
IPRB
IPRC
R/W
R/W
R/W
H'0000
H'0000
H'0000
H'FFFFFEE2
H'FFFFFEE4
16
16
16
H'04000016
(H'A4000016)
3
*
Interrupt priority register D
Interrupt priority register E
Interrupt request register 0
Interrupt request register 1
Interrupt request register 2
IPRD
IPRE
IRR0
IRR1
IRR2
R/W
R/W
R/W
R
H'0000
H'0000
H'00
H'04000018
(H'A4000018)
16
16
8
3
*
H'0400001A
(H'A400001A)
3
*
H'04000004
(H'A4000004)
3
*
H'00
H'04000006
(H'A4000006)
8
3
*
R
H'00
H'04000008
(H'A4000008)
8
3
*
Notes: 1. Initialized by a power-on or manual reset.
2. H'8000 when the NMI pin is high, H'0000 when the NMI pin is low.
3. When address translation by the MMU does not apply, the address in parentheses
should be used.
Rev. 5.00, 09/03, page 120 of 760