Table 19.5 Interrupt Exception Handling Sources and Priority Order
INTEVT Interrupt Priority IPR (Bit Priority within
Default
Interrupt Source
Code
(Initial Value)
Numbers)
IPR Setting Unit Priority
NMI
H'1C0
16
15
14
13
12
11
10
9
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
High
↑
IRL
,5/6–,5/3 = 0 H'200
,5/6–,5/3 = 1 H'220
,5/6–,5/3 = 2 H'240
,5/6–,5/3 = 3 H'260
,5/6–,5/3 = 4 H'280
,5/6–,5/3 = 5 H'2A0
,5/6–,5/3 = 6 H'2C0
,5/6–,5/3 = 7 H'2E0
,5/6–,5/3 = 8 H'300
,5/6–,5/3 = 9 H'320
,5/6–,5/3 = A H'340
,5/6–,5/3 = B H'360
,5/6–,5/3 = C H'380
,5/6–,5/3 = D H'3A0
,5/6–,5/3 = E H'3C0
—
—
—
—
—
—
—
8
—
7
—
6
—
5
—
4
—
3
—
2
—
1
—
1
1
*
*
IRL0
H'240
H'2A0
H'300
H'360
H'600
H'620
H'640
H'660
H'680
H'6A0
H'780
H'7A0
H'7C0
H'7E0
H'6C0
15–0 (13)
15–0 (10)
IPRD (15–12)
1
*
1
*
IPRD (11–8)
IRL1
1
1
*
*
IRL2
15–0 (7)
15–0 (4)
15–0 (0)
15–0 (0)
15–0 (0)
IPRD (7–4)
IPRD (3–0)
IPRC (3–0)
1
1
*
*
IRL3
H-UDI
GPIO
DMAC
H-UDI
GPIOI
DMTE0
DMTE1
DMTE2
DMTE3
DMTE4
DMTE5
DMTE6
DMTE7
DMAE
IPRC (15–12)
IPRC (11–8)
High
↑
2
2
2
2
*
*
*
*
↓
↓
Low
Low
Rev. 6.0, 07/02, page 759 of 986
RENESAS [ RENESAS TECHNOLOGY CORP ]
