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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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1. Set the clock selection in SCSCR2.  
Initialization  
Be sure to clear bits RIE and TIE,  
and bits TE and RE, to 0.  
Clear TE and RE bits  
in SCSCR2 to 0  
2. Set the transmit/receive format in  
SCSMR2.  
3. Write a value corresponding to the  
bit rate into SCBRR2. (Not  
necessary if an external clock is  
used.)  
Set TFRST and RFRST bits  
in SCFCR2 to 1  
Set CKE1 bit in SCSCR2  
(leaving TE and RE bits  
cleared to 0)  
4. Wait at least one bit interval, then  
set the TE bit or RE bit in SCSCR2  
to 1. Also set the RIE, REIE, and  
TIE bits.  
Setting the TE and RE bits enables  
the TxD2 and RxD2 pins to be  
used. When transmitting, the SCIF  
will go to the mark state; when  
receiving, it will go to the idle state,  
waiting for a start bit.  
Set transmit/receive format  
in SCSMR2  
Set value in SCBRR2  
Wait  
No  
1-bit interval elapsed?  
Yes  
Set RTRG1–0, TTRG1–0,  
and MCE bits in SCFCR2  
Clear TFRST and RFRST bits to 0  
Set TE and RE bits  
in SCSCR2 to 1,  
and set RIE, TIE, and REIE bits  
End  
Figure 16.6 Sample SCIF Initialization Flowchart  
Rev. 6.0, 07/02, page 689 of 986  
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