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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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1. Set the clock selection in SCSCR1.  
Initialization  
Be sure to clear bits RIE, TIE, TEIE,  
and MPIE, and bits TE and RE, to 0.  
Clear TE and RE bits  
in SCSCR1 to 0  
When clock output is selected in  
asynchronous mode, it is output  
immediately after SCSCR1 settings  
are made.  
Set CKE1 and CKE0 bits  
in SCSCR1 (leaving TE and  
RE bits cleared to 0)  
2. Set the transmit/receive format in  
SCSMR1.  
3. Write a value corresponding to the  
bit rate into SCBRR1. (Not  
necessary if an external clock is  
used.)  
Set transmit/receive format  
in SCSMR1  
4. Wait at least one bit interval, then set  
the TE bit or RE bit in SCSCR1 to 1.  
Also set the RIE, TIE, TEIE, and  
MPIE bits.  
Set value in SCBRR1  
Wait  
No  
Setting the TE and RE bits enables  
the TxD and RxD pins to be used.  
When transmitting, the SCI will go to  
the mark state; when receiving, it will  
go to the idle state, waiting for a start  
bit.  
1-bit interval elapsed?  
Yes  
Set TE and RE bits in SCSCR1  
to 1, and set RIE, TIE, TEIE,  
and MPIE bits  
End  
Figure 15.7 Sample SCI Initialization Flowchart  
Serial Data Transmission (Asynchronous Mode): Figure 15.8 shows a sample flowchart for  
serial transmission.  
Use the following procedure for serial data transmission after enabling the SCI for transmission.  
Rev. 6.0, 07/02, page 626 of 986  
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