欢迎访问ic37.com |
会员登录 免费注册
发布采购

HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
 浏览型号HD6417750SBP200的Datasheet PDF文件第650页浏览型号HD6417750SBP200的Datasheet PDF文件第651页浏览型号HD6417750SBP200的Datasheet PDF文件第652页浏览型号HD6417750SBP200的Datasheet PDF文件第653页浏览型号HD6417750SBP200的Datasheet PDF文件第655页浏览型号HD6417750SBP200的Datasheet PDF文件第656页浏览型号HD6417750SBP200的Datasheet PDF文件第657页浏览型号HD6417750SBP200的Datasheet PDF文件第658页  
Bit 7—Transmit Interrupt Enable (TIE): Enables or disables transmit-data-empty interrupt  
(TXI) request generation when serial transmit data is transferred from SCTDR1 to SCTSR1 and  
the TDRE flag in SCSSR1 is set to 1.  
Bit 7: TIE  
Description  
0
1
Transmit-data-empty interrupt (TXI) request disabled*  
Transmit-data-empty interrupt (TXI) request enabled  
(Initial value)  
Note: * TXI interrupt requests can be cleared by reading 1 from the TDRE flag, then clearing it to 0,  
or by clearing the TIE bit to 0.  
Bit 6—Receive Interrupt Enable (RIE): Enables or disables receive-data-full interrupt (RXI)  
request and receive-error interrupt (ERI) request generation when serial receive data is transferred  
from SCRSR1 to SCRDR1 and the RDRF flag in SCSSR1 is set to 1.  
Bit 6: RIE  
Description  
0
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI)  
request disabled*  
(Initial value)  
1
Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI)  
request enabled  
Note: * RXI and ERI interrupt requests can be cleared by reading 1 from the RDRF flag, or the  
FER, PER, or ORER flag, then clearing the flag to 0, or by clearing the RIE bit to 0.  
Bit 5—Transmit Enable (TE): Enables or disables the start of serial transmission by the SCI.  
Bit 5: TE  
Description  
1
*
0
1
Transmission disabled  
(Initial value)  
2
*
Transmission enabled  
Notes: *1 The TDRE flag in SCSSR1 is fixed at 1.  
*2 In this state, serial transmission is started when transmit data is written to SCTDR1 and  
the TDRE flag in SCSSR1 is cleared to 0.  
SCSMR1 setting must be performed to decide the transmit format before setting the TE  
bit to 1.  
Rev. 6.0, 07/02, page 602 of 986  
 复制成功!