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HD6417750SBP200 参数 Datasheet PDF下载

HD6417750SBP200图片预览
型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Bit 2—Refresh Count Overflow Flag (OVF): Status flag that indicates that the number of  
refresh requests indicated by the refresh count register (RFCR) has exceeded the number specified  
by the LMTS bit in RTCSR.  
Bit 2: OVF  
Description  
0
RFCR has not overflowed the count limit indicated by LMTS  
(Initial value)  
[Clearing condition]  
When 0 is written to OVF  
1
RFCR has overflowed the count limit indicated by LMTS  
[Setting condition]  
When RFCR overflows the count limit set by LMTS*  
Note: * If 1 is written, the original value is retained.  
Bit 1—Refresh Count Overflow Interrupt Enable (OVIE): Controls generation or suppression  
of an interrupt request when the OVF flag is set to 1 in RTCSR.  
Bit 1: OVIE  
Description  
0
1
Interrupt requests initiated by OVF are disabled  
Interrupt requests initiated by OVF are enabled  
(Initial value)  
Bit 0—Refresh Count Overflow Limit Select (LMTS): Specifies the count limit to be compared  
with the refresh count indicated by the refresh count register (RFCR). If the RFCR register value  
exceeds the value specified by LMTS, the OVF flag is set.  
Bit 0: LMTS  
Description  
0
1
Count limit is 1024  
Count limit is 512  
(Initial value)  
Rev. 6.0, 07/02, page 366 of 986  
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