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HD6417750SBP200 参数 Datasheet PDF下载

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型号: HD6417750SBP200
PDF下载: 下载PDF文件 查看货源
内容描述: 的SuperH RISC引擎 [SuperH RISC engine]
分类和应用: 外围集成电路时钟
文件页数/大小: 1039 页 / 6201 K
品牌: RENESAS [ RENESAS TECHNOLOGY CORP ]
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Section 6 Floating-Point Unit ........................................................................................ 161  
6.1 Overview........................................................................................................................... 161  
6.2 Data Formats ..................................................................................................................... 161  
6.2.1 Floating-Point Format .......................................................................................... 161  
6.2.2 Non-Numbers (NaN)............................................................................................ 163  
6.2.3 Denormalized Numbers........................................................................................ 164  
6.3 Registers............................................................................................................................ 165  
6.3.1 Floating-Point Registers....................................................................................... 165  
6.3.2 Floating-Point Status/Control Register (FPSCR)................................................. 167  
6.3.3 Floating-Point Communication Register (FPUL)................................................. 168  
6.4 Rounding........................................................................................................................... 168  
6.5 Floating-Point Exceptions ................................................................................................. 169  
6.6 Graphics Support Functions .............................................................................................. 170  
6.6.1 Geometric Operation Instructions ........................................................................ 170  
6.6.2 Pair Single-Precision Data Transfer..................................................................... 172  
Section 7 Instruction Set.................................................................................................. 173  
7.1 Execution Environment..................................................................................................... 173  
7.2 Addressing Modes............................................................................................................. 175  
7.3 Instruction Set ................................................................................................................... 179  
Section 8 Pipelining.......................................................................................................... 193  
8.1 Pipelines ............................................................................................................................ 193  
8.2 Parallel-Executability ........................................................................................................ 200  
8.3 Execution Cycles and Pipeline Stalling............................................................................. 204  
Section 9 Power-Down Modes...................................................................................... 221  
9.1 Overview........................................................................................................................... 221  
9.1.1 Types of Power-Down Modes.............................................................................. 221  
9.1.2 Register Configuration ......................................................................................... 223  
9.1.3 Pin Configuration................................................................................................. 223  
9.2 Register Descriptions ........................................................................................................ 224  
9.2.1 Standby Control Register (STBCR)..................................................................... 224  
9.2.2 Peripheral Module Pin High Impedance Control ................................................. 226  
9.2.3 Peripheral Module Pin Pull-Up Control............................................................... 226  
9.2.4 Standby Control Register 2 (STBCR2) ................................................................ 227  
9.2.5 Clock-Stop Register 00 (CLKSTP00) (SH7750R Only)...................................... 228  
9.2.6 Clock-Stop Clear Register 00 (CLKSTPCLR00) (SH7750R Only) .................... 229  
9.3 Sleep Mode........................................................................................................................ 230  
9.3.1 Transition to Sleep Mode..................................................................................... 230  
9.3.2 Exit from Sleep Mode .......................................................................................... 230  
9.4 Deep Sleep Mode .............................................................................................................. 230  
9.4.1 Transition to Deep Sleep Mode............................................................................ 230  
Rev. 6.0, 07/02, page xxiv of I  
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