4.4.3 IC Index Mode ..................................................................................................... 111
4.5 Memory-Mapped Cache Configuration (SH7750, SH7750S)........................................... 112
4.5.1 IC Address Array ................................................................................................. 112
4.5.2 IC Data Array....................................................................................................... 113
4.5.3 OC Address Array................................................................................................ 114
4.5.4 OC Data Array ..................................................................................................... 115
4.6 Memory-Mapped Cache Configuration (SH7750R) ......................................................... 116
4.6.1 IC Address Array ................................................................................................. 117
4.6.2 IC Data Array....................................................................................................... 118
4.6.3 OC Address Array................................................................................................ 119
4.6.4 OC Data Array ..................................................................................................... 120
4.6.5 Summary of the Memory-Mapping of the OC..................................................... 121
4.7 Store Queues ..................................................................................................................... 122
4.7.1 SQ Configuration ................................................................................................. 122
4.7.2 SQ Writes............................................................................................................. 122
4.7.3 Transfer to External Memory............................................................................... 122
4.7.4 SQ Protection ....................................................................................................... 124
4.7.5 Reading the SQs (SH7750R Only)....................................................................... 124
4.7.6 SQ Usage Notes ................................................................................................... 125
Section 5 Exceptions ........................................................................................................ 127
5.1 Overview........................................................................................................................... 127
5.1.1 Features ................................................................................................................ 127
5.1.2 Register Configuration ......................................................................................... 127
5.2 Register Descriptions ........................................................................................................ 128
5.3 Exception Handling Functions .......................................................................................... 129
5.3.1 Exception Handling Flow..................................................................................... 129
5.3.2 Exception Handling Vector Addresses................................................................. 129
5.4 Exception Types and Priorities.......................................................................................... 130
5.5 Exception Flow ................................................................................................................. 132
5.5.1 Exception Flow .................................................................................................... 132
5.5.2 Exception Source Acceptance.............................................................................. 133
5.5.3 Exception Requests and BL Bit............................................................................ 135
5.5.4 Return from Exception Handling ......................................................................... 135
5.6 Description of Exceptions ................................................................................................. 135
5.6.1 Resets ................................................................................................................... 136
5.6.2 General Exceptions .............................................................................................. 141
5.6.3 Interrupts .............................................................................................................. 155
5.6.4 Priority Order with Multiple Exceptions.............................................................. 158
5.7 Usage Notes....................................................................................................................... 159
5.8 Restrictions........................................................................................................................ 160
Rev. 6.0, 07/02, page xxiii of I
RENESAS [ RENESAS TECHNOLOGY CORP ]
