RESET
3.3 State of internal area
Register name
Address
Access characteristics
State immediately after reset
b7
b0
b7
b0
(Note 17)
?
?
?
A016
A116
A216
A316
A416
A516
A616
A716
A816
A916
AA16
(Note 17)
(Note 17)
?
?
?
Wave output mode register
Dead-time timer
RW
WO
RW
RW
0016
?
0016
0016
Three-phase output data register 0
Three-phase output data register 1
0
0
0
0
0
0
0
0
0
0
?
RW RO RO RO
RWRWRW RW
RWRWRW RW
Position-data-retain function control register
AB16
AC16
AD16
AE16
AF16
B016
B116
B216
B316
B416
B516
B616
B716
B816
B916
BA16
BB16
BC16
BD16
BE16
BF16
?
?
0
0
0
?
0
?
0
?
0
0
Serial I/O pin control register
Port P2 pin function control register
RW
?
?
?
?
?
?
?
?
?
?
?
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 17)
(Note 18)
RW RWRWRW
(Note 17)
?
?
Clock control register 0
RW RW
0
0
0
1
0
1
1
1
?
?
?
(Note 17)
(Note 17)
Notes 17 : Do not write to this register.
18 : After reset, these bits are allowed to be changed only once.
Fig. 3.3.7 State of SFR and internal RAM areas immediately after reset (6)
7906 Group User’s Manual Rev.2.0
3-12