APPENDIX
Appendix 2. Control registers
b7 b6 b5 b4 b3 b2 b1 b0
Debug control register 0 (Address 6616)
0
0 0
Reference
Bit
0
Bit name
Function
At reset R/W
b2 b1b0
0 0 0 : Do not select.
17-3
Detect condition select bits
(Note 2) RW
(Note 1)
0 0 1 : Address matching detection 0
0 1 0 : Address matching detection 1
0 1 1 : Address matching detection 2
1 0 0 : Do not select.
(Note 2) RW
(Note 2) RW
1
2
1 0 1 : Out-of-address-area detection
1 1 0 :
Do not select.
1 1 1 :
3
4
5
Fix these bits to “00.”
Detect enable bit
(Note 2) RW
(Note 2) RW
(Note 2) RW
0 : Detection disabled.
1 : Detection enabled.
6
7
Fix this bit to “0.”
(Note 2) RW
The value is “1” at reading.
—
1
Notes 1: These bits are valid when the detect enable bit (bit 5) = “1.” Therefore, these bits must be set before or simultaneously with
setting of the detect enable bit to “1.”
2: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately
before reset.
b7 b6 b5 b4 b3 b2 b1 b0
Debug control register 1 (Address 6716)
1
0
Bit
0
Bit name
Fix this bit to “0.”
Function
At reset R/W
Reference
17-4
(Note 1) RW
1
The value is “0” at reading.
(Note 1)
RO
2
0 : Disabled.
1 : Enabled.
Address compare register
access enable bit (Note 2)
0
RW
Fix this bit to “1” when using the debug function.
Nothing is assigned.
3
4
5
0
Undefined
0
RW
—
RO
While a debugger is not used, the value is “0” at reading.
While a debugger is used, the value is “1” at reading.
6
0
Address-matching-detection 2
decision bit
0 : Matches with the contents of the address com-
pare register 0.
RO
(Valid when the address match- 1 : Matches with the contents of the address com-
ing detection 2 is selected.)
pare register 1.
7
0
—
The value is “0” at reading.
Notes 1: At power-on reset, each bit becomes “0”; at hardware reset or software reset, each bit retains the value immediately before reset.
2: Be sure to set this bit to “1” immediately before the access to the address compare registers 0 and 1 (addresses 6816 to
6D16). Then, be sure to clear this bit to “0” immediately after this access.
(b23) (b16)(b15) (b8)
b7
b0 b7
b0 b7
b0
Address compare register 0 (Addresses 6A16 to 6816)
Address compare register 1 (Addresses 6D16 to 6B16)
Bit
Function
At reset R/W
Reference
17-5
23 to 0 The address to be detected (in other words, the start address of instructions) is set here. Undefined RW
Note: When accessing these registers, be sure to set the address compare register access enable bit (bit 2 at address 6716) to “1”
immediately before this access. Then, be sure to clear this bit to “0” immediately after this access.
7906 Group User’s Manual Rev.2.0
20-33
RENESAS [ RENESAS TECHNOLOGY CORP ]
