APPENDIX
Appendix 2. Control registers
b7 b6 b5 b4 b3 b2 b1 b0
Processor mode register 0 (Address 5E16)
0
0
X X
0
Bit
0
Bit name
Function
At reset
R/W
RW
Reference
b1 b0
2-20
Processor mode bits
0
0 0 : Single-chip mode
0 1 : Do not select.
1 0 : Do not select.
1 1 : Do not select.
0
1
RW
2
3
4
Any of these bits may be either “0” or “1.”
0
1
0
RW
RW
RW
b5 b4
6-12
3-3
Interrupt priority detection time
select bits
0 0 : 7 cycles of fsys
0 1 : 4 cycles of fsys
1 0 : 2 cycles of fsys
1 1 : Do not select.
5
RW
WO
RW
0
0
0
The microcomputer is reset by writing “1” to this
bit. The value is “0” at reading.
Software reset bit
Fix this bit to “0.”
6
7
X : It may be either “0” or “1.”
b7 b6 b5 b4 b3 b2 b1 b0
Processor mode register 1 (Address 5F16)
0 0 0 0
0
X
Bit
0
Bit name
Function
At reset
R/W
Reference
1
RW
This bit may be either “0” or “1.”
Direct page register switch bit
2-6
0 : Only DPR0 is used.
1 : DPR0 through DPR3 are used.
0
RW
(Note 1)
1
Fix these bits to “00000.”
0
0
RW
RW
6 to 2
7
2-12
0 : 3φ
1 : 2φ
Internal ROM bus cycle select bit
(Note 2)
X : It may be either “0” or “1.”
Notes 1: After reset, this bit is allowed to be changed only once. (During the software execution, be sure not to change this bit’s
content.)
2: To reprogram the internal flash memory by using the CPU reprogramming mode, clear this bit to “0.” (Refer to section
“19.2 Flash memory CPU reprogramming mode.”)
7906 Group User’s Manual Rev.2.0
20-29
RENESAS [ RENESAS TECHNOLOGY CORP ]
