FLASH MEMORY VERSION
19.2 Flash memory CPU reprogramming mode
(5) Block erase command
Writing of command code “2016” at the 1st bus
cycle and “D016” to the highest address (here,
Start
A = 0) of the block to be erased at the 2nd
0
bus cycle initiate the automatic erase (erase
and erase-verify) operation for the specified
block. During the automatic erase operation,
be sure not to access the flash memory or not
to execute the next command. The completion
of the automatic erase operation can be
recognized by the RY/BY status bit (bit 0 at
address 9E16).
Command code
“2016” is written.
“D016” is written to the highest
address of the block.
RY/BY status bit = “1”?
(bit 0 at address 9E16
)
NO
After the automatic erase operation is completed,
the result of it can be recognized by reading
out the status register. (Refer to section “19.2.5
Full status check.”)
Figure 19.2.4 shows the block erase operation
flowchart.
YES
••• See Figure 19.2.6.
Full status check
Block erase operation is
completed.
(6) Erase-all-blocks command
Writing of command code “2016” at the 1st bus
cycle and “2016” at the 2nd bus cycle initiate
the automatic erase (erase and erase-verify)
operation for all the blocks. During the automatic
erase operation, be sure not to access the flash
memory or not to execute the next command.
The completion of the automatic erase operation
can be recognized by the RY/BY status bit (bit
0 at address 9E16).
After the automatic erase operation is completed,
the result of it can be recognized by reading
out the status register. (Refer to section “19.2.5
Full status check.”)
Fig. 19.2.4 Block erase operation flowchart
Start
Command code
“2016” is written.
“2016” is written.
Figure 19.2.5 shows the erase-all-blocks
operation flowchart.
RY/BY status bit = “1”?
(bit 0 at address 9E16)
NO
YES
Full status check
••• See Figure 19.2.6.
Erase-all-blocks
operation is completed.
Fig. 19.2.5 Erase-all-blocks operation flowchart
7906 Group User’s Manual Rev.2.0
19-15
RENESAS [ RENESAS TECHNOLOGY CORP ]
