CENTRAL PROCESSING UNIT (CPU)
2.1 Central processing unit (CPU)
2.1.8 Direct page register 0 to 3 (DPR0 to DPR3)
Each of direct page registers 0 to 3 (hereafter called the “DPRi”) is a 16-bit register. The contents of this
register specify the direct page area in bank 016 or in the space across banks 016 and 116. The following
addressing modes use DPRi.
The contents of the DPRi indicate the base address (the lowest address) of the direct page area. The direct
page area is specified in the space above this address.
After reset, whether to use DPR0 only or DPR0 to DPR3 can be selected by the direct page register switch
bit. (See Figure 2.1.5). This selection specifies the direct page area. Table 2.1.1 lists the selection of the
direct page register. Figure 2.1.4 shows setting examples of the direct page area.
At reset, DPR0 = “000016,” and each of DPR1 to DPR3 becomes undefined.
❈❈Addressing modes using direct page register
• Direct
Table 2.1.1 Selection of direct page register
• Direct indexed X
• Direct indexed Y
• Direct indirect
• Direct indexed X indirect
• Direct indirect indexed Y
• Direct indirect long
• Direct indirect long indexed Y
• Direct bit relative
Direct page register switch bit
0
1
DPR0
DPR0 to DPR3
64 bytes at
each DPRi
Usable DPRi
256 bytes
Direct page area
❈ Refer to “7900 Series Software Manual” for addressing modes and instructions.
❈ Direct page register switch bit = 0
❈ Direct page register switch bit = 1
0
16
0
16
016
016
When DPR0 = 000016
3F16
When DPR0 = 000016
When DPR0 = 012316
4016
FF16
When DPR1 = 004016
When DPR2 = 080016
7F16
800
83F1166
12316
22216
Bank 016
Bank 016
FF1016
When DPR0 = FF1016
FFD016
1000F16
FFFF16
1000016
FFFF16
1000016
When DPR3 = FFD016
1000F16
Bank 116
Bank 116
The direct page area is specified in space across banks 016
and 16 when DPR0 is “FF0116” or more.
The direct page area is specified in the space across banks 016
and 16 when DPRi is “FFC116” or more.
1
1
Note: When the low-order 8 bits of DPRi = “00,” the number of cycles required for address generation becomes 1 cycle smaller.
Fig. 2.1.4 Setting examples of direct page area
7906 Group User’s Manual Rev.2.0
2-6
RENESAS [ RENESAS TECHNOLOGY CORP ]
