PULSE OUTPUT PORT MODE
9.2 Block description
b7 b6 b5 b4 b3 b2 b1 b0
Port P2 direction register (Address 816)
Bit
0
Corresponding pin
Functions
At reset R/W
0 : Input mode
1 : Output mode
Pin TA4OUT
0
0
0
0
0
0
0
0
RW
RW
RW
RW
RW
RW
RW
RW
Pin TA4IN
Pin TA9OUT
Pin TA9IN
Pin TB0IN
Pin TB1IN
Pin TB2IN
1
When using this pin as a pulse output trigger
input pin, be sure to clear the corresponding bit
to “0.”
2
3
(Note 1)
(Note 2)
(Note 3)
4
5
6
Pin RTPTRG0 (Pin INT3) (Note 4)
7
Notes 1: This applies when the pin TB0IN select bit (bit 0 at address AE16) = 1.
2: This applies when the pin TB1IN select bit (bit 1 at address AE16) = 1.
3: This applies when the pin TB2IN select bit (bit 2 at address AE16) = 1.
4: This applies when the pin INT /RTPTRG0 select bit (bit 3 at address AE16) = 1.
3
5: ( ) shows the I/O pin of another internal peripheral device which is multiplexed.
b7 b6 b5 b4 b3 b2 b1 b0
Port P7 direction register (Address 1116)
Function
Bit
0
Corresponding pin
At reset R/W
0 : Input mode
1 : Output mode
Pin AN0
Pin AN1
Pin AN2
0
0
0
0
0
RW
RW
RW
RW
RW
1
When using this pin as a pulse output trigger
input pin, be sure to clear the corresponding bit
to “0.”
2
3
Pin AN3/DA0
Pin RTPTRG0 (Pin AN4/DA1/INT3)
4
(Note 1)
Nothing is assigned.
7 to 5
Undefined
—
Notes 1: This applies when the pin INT
3
/RTPTRG0 select bit (bit 3 at address AE16) = 0.
2: ( ) shows the I/O pin of another internal peripheral device which is multiplexed.
Fig. 9.2.5 Relationship between port P2/P7 direction register and pulse output trigger input pins
7906 Group User’s Manual Rev.2.0
9-10
RENESAS [ RENESAS TECHNOLOGY CORP ]
