PULSE OUTPUT PORT MODE
9.2 Block description
Table 9.2.3 Pulse-width-modulation-related bits
Pulse output pins where
pulse width modulation is to
be applied (Timers used for
pulse width modulation)
Pulse width modu-
lation timer select bits
(bits 5, 4 at
Pulse width modu-
lation enable bit 1
Pulse width modu-
lation enable bit 2
Pulse width modu-
lation enable bit 0
(bit 1 at address A916
)
(bit 0 at address A916
(bit 2 at address A916
)
)
address A616
)
RTP0
(Timer A1)
3
to RTP0
0
0
Pulse
mode
4 pins
6 pins
➀
1
00
➀
0
RTP1
RTP0
(Timer A1)
1
3
, RTP1
0
,
to RTP0
➀
1
00
01
➀
➀
RTP1
RTP0
(Timer A2)
1
3
, RTP1 ,
0
In a
unit of
1
➀
Pulse
mode
3 pins
1
RTP0
(Timer A1)
2
to RTP0
0
➀
➀
1
➀
RTP1
(Timer A4)
1
, RTP1
0
➀
1
In a
unit of
2 pins
RTP0
(Timer A2)
3
, RTP0
2
0
10
1
➀
➀
➀
RTP0 , RTP0
1
➀
1
(Timer A1)
X: It may be either “0” or “1.”
7906 Group User’s Manual Rev.2.0
9-8