INPUT/OUTPUT PINS
5.2 Programmable I/O ports
Direction register
Port latch
P7
P7
P7
P7
0
/AN
/AN
/AN
/AN
0, P7
2, P7
4, P7
6
1
3
5
/AN
/AN
/AN
1
3
5
2
4
Data bus
6
Analog input
Direction register
Port latch
P77/AN7/DA0
Data bus
Analog input
Analog output
Enable D-A output
1
0
Direction register
Port latch
P10
P11
P14
P15
/CTS
0
0
1
1
/RTS
/CLK
/RTS
/CLK
0
/CTS
/CTS
/CTS
0
Output (internal peripheral device)
1
1
Data bus
1
0
Direction register
P80/AN8/CTS2/RTS2/DA1
Output (internal peripheral device)
Data bus
Port latch
Analog input
Analog output
Enable D-A output
1
0
Direction register
Port latch
P81/AN9/CTS2/CLK2
Output (internal peripheral device)
Data bus
Analog input
Fig. 5.2.5 Port peripheral circuits (2)
7905 Group User’s Manual Rev.1.0
5-6
RENESAS [ RENESAS TECHNOLOGY CORP ]
