APPENDIX
Appendix 1. Memory assigment in SFR area
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Address
Register name
Access characteristics
State immediately after reset
b7
b0
b7
b0
(Note 14)
(Note 14)
(Note 14)
(Note 14)
(Note 14)
(Note 14)
(Note 14)
(Note 14)
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
?
8016
8116
8216
8316
8416
8516
8616
8716
8816
8916
8A16
8B16
8C16
8D16
8E16
8F16
9016
9116
9216
9316
9416
9516
9616
9716
9816
9916
9A16
9B16
9C16
9D16
(Note 14)
(Note 14)
(Note 14)
(Note 14)
(Note 14)
?
?
?
?
?
RO
External interrupt input read-out register
D-A control register
RW RW
?
0
0
?
0016
0016
?
RW
RW
D-A register 0
D-A register 1
?
?
?
(Note 14)
(Note 14)
RW
9E16 Flash memory control register (Note 15)
0
0
1
RW
RW RO
0
0
0
0
0
9F16
?
Notes 14 : Do not write to this register.
15 : This register is assigned only to the flash memory version. (Refer to “CHAPTER 19. FLASH MEMORY
VERSION.”) Nothing is assigned here in the mask ROM version.
7905 Group User’s Manual Rev.1.0
20-6
RENESAS [ RENESAS TECHNOLOGY CORP ]
