APPENDIX
Appendix 1. Memory assigment in SFR area
Access characteristics
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid.
: The written value becomes valid. It is impossible to read the bit state.
RW
RO
WO
: Nothing is assigned. It is impossible to read the bit state. The written value becomes invalid.
State immediately after reset
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after
reset.
0
1
?
: Always “0” at reading.
0
1
?
0
: Always “1” at reading.
: Always undefined at reading.
: “0” immediately after reset. Fix this bit to “0.”
Address
Register name
Access characteristics
State immediately after reset
b7
b7
b0
b0
(Note 19)
?
?
E016
E116
E216
E316
E416
E516
E616
E716
E816
E916
EA16
EB16
EC16
ED16
EE16
EF16
F016
A-D register 8
A-D register 9
A-D register 10
A-D register 11
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
?
?
?
?
0
0
0
0
(Note 19)
(Note 19)
(Note 19)
(Note 19)
(Note 19)
(Note 19)
0
0
0
?
?
(Note 19)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
(Note 20)
?
?
?
?
?
?
?
?
?
F116
F216
F316
F416
F516
F616
F716
F816
F916
FA16
FB16
FC16
FD16
FE16
FF16
0
0
0
0
0
0
0
0
UART2 transmit interrupt control register
UART2 receive interrupt control register
?
?
RW
RW
?
?
Timer A5 interrupt control register
Timer A6 interrupt control register
Timer A7 interrupt control register
Timer A8 interrupt control register
Timer A9 interrupt control register
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
?
?
?
?
?
RW
RW
RW
RW
RW
(Note 20)
(Note 20)
(Note 20)
?
?
?
INT
INT
INT
5
6
7
interrupt control register
interrupt control register
interrupt control register
0
0
0
0
0
0
RW
RW
RW
?
0
0
0
0
0
0
0
0
0
0
0
0
?
?
Notes 19: The access characteristics at addresses E016 to E716 vary according to the contents of the comparator function
select register 1 (address DD16). (Refer to “CHAPTER 12. A-D CONVERTER.”)
20: Do not write to this register.
7905 Group User’s Manual Rev.1.0
20-9