APPENDIX
Appendix 2. Control registers
Appendix 2. Control registers
The control registers allocated in the SFR area are shown on the following pages.
Below is the structure diagram for all registers.
✽3
✽2
✽1
b7 b6 b5 b4 b3 b2 b1 b0
XXX register (address XX16)
✽4
✽5
X 0
Function
Bit
Bit name
• • • select bit
At reset R/W
Reference
3-10
0
0 : …
1 : …
Undefined WO
The value is “0” at reading.
b2 b1
3-11
1
2
3
• • • select bit
0
0
0
RW
RW
RO
0 0 : …
0 1 : …
1 0 : …
1 1 : …
2-6
0 : …
1 : …
• • • flag
Fix this bit to “0.”
0
RW
RW
–
4
5
6
7
This bit is invalid in … mode.
Nothing is assigned.
0
Undefined
0
The value is “0” at reading.
–
✽6
✽1
Blank
: Set to “0” or “1” according to the usage.
0
: Set to “0” at writing.
1
: Set to “1” at writing.
✽
: Invalid depending on the mode or state. It may be “0” or “1.”
: Nothing is assigned.
✽2
✽3
0
1
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after reset.
Undefined
RW
RO
: It is possible to read the bit state at reading. The written value becomes valid.
: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be “0” or “1.”
WO
: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See✽✽5 above.)
—
: It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See✽✽6 above.)
The written value becomes invalid. Accordingly, the written value may be “0” or “1.”
Reference page for each bit.
✽4
7905 Group User’s Manual Rev.1.0
20-10
RENESAS [ RENESAS TECHNOLOGY CORP ]
