A-D CONVERTER
12.2 Block description
b7 b6 b5 b4 b3 b2 b1 b0
A-D control register 1 (Address 1F16
)
0
Bit
0
Bit name
At reset
1
Function
R/W
RW
Single sweep mode/Repeat sweep mode 0
A-D sweep pin select bits
b1 b0
(Valid in the single sweep mode,
repeat sweep mode 0 and
0 0 : Pins AN0 and AN1 (2 pins)
0 1 : Pins AN0 to AN3 (4 pins)
1 0 : Pins AN0 to AN5 (6 pins)
repeat sweep mode 1.)
(Note 1)
1 1 : Pins AN0 to AN7 (8 pins) (Note 2)
1
RW
1
Repeat sweep mode 1
b1 b0
(Note 3)
0 0 : Pin AN0 (1 pin)
0 1 : Pins AN0 and AN1 (2 pins)
1 0 : Pins AN0 to AN2 (3 pins)
1 1 : Pins AN0 to AN3 (4 pins)
A-D operation mode select bit 1
(Used in the repeat sweep mode 0
and repeat sweep mode 1.)(Note 4)
0 : Repeat sweep mode 0
1 : Repeat sweep mode 1
0
RW
RW
2
3
Resolution select bit
0
0
0 : 8-bit resolution mode
1 : 10-bit resolution mode
A-D conversion frequency (φAD) select bit 1
Fix this bit to “0.”
4
5
6
RW
RW
See Table 12.2.1.
0
0
VREF connection select bit (Note 5) 0 : Pin VREF is connected.
RW
1 : Pin VREF is disconnected.
–
The value is “0” at reading.
7
0
Notes 1: These bits are invalid in the one-shot and repeat modes. (They may be either “0” or “1.”)
2: When using pin AN7, be sure that the D-A0 output enable bit (bit 0 at address 9616) = “0” (output disabled).
3: Be sure to select frequently-used analog input pins in the repeat sweep mode 1.
4: Fix this bit to “0” in the one-shot mode, repeat mode, and single sweep mode.
5: When this bit is cleared from “1” to “0,” be sure to start the A-D conversion after an interval of 1 µs or more has elapsed.
6: Writing to each bit of the A-D control register 1 must be performed while the A-D converter halts, regardless of the A-D
operation mode.
Fig. 12.2.3 Structure of A-D control register 1
7905 Group User’s Manual Rev.1.0
12-6