RTL8306SD/RTL8306SDM
Datasheet
Pin Name
Pin
No.
Type Drive Description
(MA)
Default
PHY 2
78
I/O
4
Input upon reset in all modes.
1
PRXD [3]/
M2TXD[3]/
ENBKPRS
(IPU)
The pin is strapping pin ENBKPRS and sets backpressure in
half duplex mode on all UTP ports.
1: Enable
0: Disable
After reset
When MII/RMII 2 is not enabled; this pin is not used.
When MII/RMII 2 is enabled for PHY4 or MAC5:
For MAC mode MII; this is output pin M2TXD[3].
For PHY mode MII; this is output pin PHY2PRXD[3].
For RMII mode: Not used.
PHY 2
77
I/O
4
Input upon reset in all modes.
1
PRXD[2]/
M2TXD[2]/
GYENFC
(IPU)
The pin is strapping pin GYENFC.
To enable Flow Control ability of GROUP Y:
1: Enable Reg4.10 (NWAY Full duplex only), or ‘Enable
Force Full pause ability of Force Mode (UTP Force Mode)’,
or ‘Enable Force Half Back Pressure ability of Force Mode
(UTP Force Mode )’.
0: Disable Reg4.10 (NWAY Full duplex only), or ‘Disable
Force Full pause ability of Force Mode (UTP Force Mode)’,
or ‘Disable Force Half Back Pressure ability of Force Mode
(UTP Force Mode)’.
Strap after reset for initial value of Group Y ‘UTP NWAY
Full’, or ‘UTP Force Full or Half Mode’.
After reset:
When MII/RMII 2 is not enabled; this pin is not used.
When MII/RMII 2 is enabled for PHY4 or MAC5:
For MAC mode MII; this pin is output pin M2TXD[2].
For PHY mode MII; this pin is output pin PHY2PRXD[2].
For RMII mode: Not used.
6-Port 10/100Mbps Single-Chip Dual MII/RMII Switch Controller
20
Track ID: JATR-1076-21 Rev. 1.1