RTL8306SD/RTL8306SDM
Datasheet
Pin Name
Pin
No.
Type Drive Description
(MA)
Default
DISPORT
PRI[1]
84
I
-
When MII/RMII 2 is not enabled, this pin is strapping pin
DISPORTPRI[1].
1
(IPU)
/
To enable port-based priority QoS function on port 1:
Upon reset:
1: Disable port 1 priority
PHY2
PTXD[0]/
M(R)2RXD[0]
0: Enable port 1 priority
After reset:
Not used.
When MII/RMII 2 is enabled for PHY 4 or MAC 5:
For PHY mode MII; this pin is input pin PHY2PTXD[0].
For MAC mode MII; this pin is input pin M2RXD[0]
For RMII mode; this pin is input pin R2RXD[0].
When under the above modes, DISPORTPRI[1] power on
strapping is not supported. Port priority function can be set
from the MII register.
DISPORT
PRI[0]
83
I
-
When MII/RMII 2 is not enabled, this pin is strapping pin
DISPORTPRI[0].
1
(IPU)
/
To enable port-based priority QoS function on port 0:
Upon reset:
1: Disable port 0 priority
PHY2
PTXEN/
M2RXDV/
CRSDV2
0: Enable port 0 priority
After reset:
Not used.
When MII/RMII 2 is enabled for PHY 4 or MAC 5:
For PHY mode MII; this pin is input pin PHY2PTXEN.
For MAC mode MII; this pin is input pin M2RXDV.
For RMII mode; this pin is input pin CRSDV2.
When in the above modes, DISPORTPRI[0] power on
strapping is not supported. Port priority function can be set
from the MII register.
6-Port 10/100Mbps Single-Chip Dual MII/RMII Switch Controller
18
Track ID: JATR-1076-21 Rev. 1.1