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RTL8306SD-VC-GR 参数 Datasheet PDF下载

RTL8306SD-VC-GR图片预览
型号: RTL8306SD-VC-GR
PDF下载: 下载PDF文件 查看货源
内容描述: [Micro Peripheral IC]
分类和应用:
文件页数/大小: 132 页 / 1325 K
品牌: REALTEK [ Realtek Semiconductor Corp. ]
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RTL8306SD/RTL8306SDM  
Datasheet  
Pin Name  
Pin  
No.  
Type Drive Description  
(MA)  
Default  
PHY2  
89  
I/O  
4
When MII/RMII 2 is not enabled, this pin is strapping pin  
1
LED_BLINK_TIME only.  
PCOL  
(IPU)  
To set the blinking speed of the activity and collision LEDs.  
Upon reset:  
1: On 43ms, then Off 43ms  
/M2COL  
/LED_  
BLNK_  
TIME  
0: On 120ms, then Off 120ms  
After reset:  
Not used.  
When MII/RMII 2 is enabled for PHY 4 or MAC 5:  
For MAC mode MII, this pin is input pin M2COL.  
For PHY mode MII, this pin is IO pin  
PHY2COL/LED_BLNK_TIME.  
Upon reset this pin is strapping pin LED_BLINK_TIME:  
1: On 43ms, then Off 43ms  
0: On 120ms, then Off 120ms  
After reset:  
This pin is output pin PHY2COL.  
For RMII mode it is strapping pin LED_BLINK_TIME.  
Upon reset:  
1: On 43ms, then Off 43ms  
0: On 120ms, then Off 120ms  
After reset:  
Not used.  
PHY2PTXC/  
M2RXC/REFCL  
K2  
82  
I/O  
(IPU)  
8
When MII/RMII 2 is enabled for PHY 4 or MAC 5:  
For MAC mode MII; the 2 pins are input pin M2RXC.  
1
For PHY mode MII; the 2 pins are output pin PHY2PTXC.  
For RMII mode, pin 82 is bi-directional pin REFCLK2,  
whose direction is controlled by pin 81.  
Pin 81Ctrl_REFCLK2 is a strapping pin to control the  
direction of Pin 82 in RMII mode.  
PHY2PRXC/  
M2TXC/  
Ctrl_REFCLK2  
81  
I/O  
(IPU)  
8
1
Upon reset:  
If pin 81 is pulled-high, then pin 82 is an input pin to receive  
an external 50MHz RMIICLOCK.  
If pin 81 is pulled-low, then pin 82 is an output pin to  
provide a 50MHz RMIICLOCK.  
6-Port 10/100Mbps Single-Chip Dual MII/RMII Switch Controller  
19  
Track ID: JATR-1076-21 Rev. 1.1  
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