RTL8201E(L)
Datasheet
9.1.6. Input Voltage: Vcc
Table 32. Input Voltage: Vcc
Symbol Condition
Minimum
Maximum
Vcc +0.5V
0.7V
TTL VIH Input High Voltage
TTL VIL Input Low Voltage
TTL VOH Output High Voltage
TTL VOL Output Low Voltage
-
-
0.5*Vcc
-0.5V
IOH=-8mA
IOL=8mA
0.65*Vcc
-
Vcc
0.7V
TTL IOZ
IIN
Tri-State Leakage
Input Current
Vout=Vcc or GND
Vin=Vcc or GND
-110µA
-1µA
10µA
10µA
IPL
Input Current with Internal weakly pulled low resistor Vin=Vcc or GND
-1µA
100µA
10µA
IPH
Input Current with Internal weakly pulled high
resistor
Vin=Vcc or GND
-110µA
PECL VIH PECL Input High Voltage
PECL VIL PECL Input Low Voltage
PECL VOH PECL Output High Voltage
PECL VOL PECL Output Low Voltage
-
-
-
-
Vdd -1.16V Vdd -0.88V
Vdd -1.81V Vdd -1.47V
Vdd -1.02V
-
-
Vdd -1.62V
9.2. AC Characteristics
9.2.1. MII Transmission Cycle Timing
Table 33. MII Transmission Cycle Timing
Symbol Description
Minimum Typical Maximum Unit
T1
T2
t3
TXCLK High Pulse Width
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
100Mbps
10Mbps
14
140
14
140
-
20
26
260
26
260
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
200
TXCLK Low Pulse Width
TXCLK Period
20
200
40
-
400
-
t4
TXEN, TXD[0:3]
Setup to TXCLK Rising Edge
10
5
-
-
-
-
t5
TXEN, TXD[0:3]
Hold After TXCLK Rising Edge
0
-
25
-
0
-
t6
TXEN Sampled to CRS High
TXEN Sampled to CRS Low
Transmit Latency
-
-
40
400
160
2000
140
2000
170
-
-
-
-
t7
-
-
-
t8
60
-
70
-
t9
Sampled TXEN Inactive to End of Frame
-
100
-
-
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
28
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
