RTL8201E(L)
Datasheet
7.7. Register 6 Auto-Negotiation Expansion Register (ANER)
This register contains additional status for NWay auto-negotiation.
Table 17. Register 6 Auto-Negotiation Expansion Register (ANER)
Description
Address Name
Mode Default
6:15~5 Reserved
Reserved.
-
-
6:4
6:3
6:2
6:1
MLF
Indicates whether a Multiple Link Fault Has Occurred.
RO
0
1: Fault occurred
LP_NP_ABLE Indicates whether the Link Partner Supports Next Page Negotiation.
1: Supported 0: Not supported
0: No fault occurred
RO
RO
RO
0
0
0
NP_ABLE
This bit indicates whether the local node is able to send additional Next
Pages. Internal use only.
PAGE_RX
This Bit is Set when a New Link Code Word Page Has Been Received.
It is automatically cleared when the auto-negotiation link partner’s
ability register (register 5) is read by management.
6:0
LP_NW_ABLE 1: Link partner supports NWay auto-negotiation.
RO
0
7.8. Register 16 NWay Setup Register (NSR)
Table 18. Register 16 NWay Setup Register (NSR)
Address Name
Description
Mode Default
16:15~11 Reserved
Realtek Test Mode Internal Use.
-
-
Do not change this field without Realtek’s approval.
16:10
16:9
Testfun
1: Auto-negotiation speeds up internal timer
1: Set NWay to loopback mode
RW
RW
-
0
0
-
NWLPBK
16:8~3 Reserved
Reserved.
16:2
16:1
16:0
FLAGABD
FLAGPDF
FLAGLSC
1: Auto-negotiation experienced ability detect state
1: Auto-negotiation experienced parallel detection fault state
1: Auto-negotiation experienced link status check state
RO
RO
RO
0
0
0
7.9. Register 17 Loopback, Bypass, Receiver Error Mask
Register (LBREMR)
Table 19. Register 17 Loopback, Bypass, Receiver Error Mask Register (LBREMR)
Address Name
Description
Mode Default
17:15
17:14
17:13
17:12
17:11
17:10
17:9
RPTR
Set to 1 to put the RTL8201E(L) into repeater mode.
Assertion of this bit allows bypassing of the 4B/5B & 5B/4B encoder.
Assertion of this bit allows bypassing of the Scrambler/Descrambler.
Set to 1 to enable Link Down Power Saving mode.
Set to 1 to power down the analog function of transmitter and receiver.
Sets the inverse function of the Receive/Transmit LED.
Set to 1 to enable DSP loopback.
RW
RW
RW
RW
RW
RW
RW
RW
0
0
0
0
0
1
0
1
BP_4B5B
BP_SCR
LDPS
AnalogOFF
BMODE_EN
LB
17:8
F_Link_10
Used to logic force a good link in 10Mbps for diagnostic purposes.
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
with Auto MDIX
15
Track ID: JATR-1076-21 Rev. 1.3
REALTEK [ Realtek Semiconductor Corp. ]
