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    RTL8201CL-VD-LF 参数 Datasheet PDF下载

    RTL8201CL-VD-LF图片预览
    型号： RTL8201CL-VD-LF
    PDF下载： 下载PDF文件 查看货源
    内容描述： [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP48,]
    分类和应用： 以太网：16GBASE-T电信电信集成电路
    文件页数/大小： 39 页 / 529 K
    品牌： REALTEK [ REALTEK ]
     浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第1页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第2页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第3页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第5页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第6页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第7页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第8页浏览型号RTL8201CL-VD-LF的Datasheet PDF文件第9页  
    RTL8201CL
    Datasheet
    Table of Contents
    1.
    2.
    3.
    4.
    5.
    GENERAL DESCRIPTION................................................................................................................................................1
    FEATURES...........................................................................................................................................................................1
    BLOCK DIAGRAM.............................................................................................................................................................2
    PIN ASSIGNMENTS ...........................................................................................................................................................3
    4.1.
    5.1.
    5.2.
    5.3.
    5.4.
    5.5.
    5.6.
    5.7.
    5.8.
    6.
    6.1.
    6.2.
    6.3.
    6.4.
    6.5.
    6.6.
    6.7.
    6.8.
    6.9.
    6.10.
    6.11.
    6.12.
    7.
    7.1.
    7.1.1.
    7.1.2.
    7.2.
    7.2.1.
    7.2.2.
    7.2.3.
    7.2.4.
    7.3.
    7.4.
    7.5.
    7.6.
    7.7.
    7.8.
    7.8.1.
    7.8.2.
    7.8.3.
    7.9.
    7.10.
    L
    EAD
    (P
    B
    )-F
    REE
    P
    ACKAGE
    I
    DENTIFICATION
    ................................................................................................................3
    MII I
    NTERFACE
    ............................................................................................................................................................4
    SNI (S
    ERIAL
    N
    ETWORK
    I
    NTERFACE
    ) 10M
    BPS
    O
    NLY
    ....................................................................................................5
    C
    LOCK
    I
    NTERFACE
    .......................................................................................................................................................5
    10M
    BPS
    /100M
    BPS
    N
    ETWORK
    I
    NTERFACE
    ....................................................................................................................6
    D
    EVICE
    C
    ONFIGURATION
    I
    NTERFACE
    ...........................................................................................................................6
    LED I
    NTERFACE
    /PHY A
    DDRESS
    C
    ONFIGURATION
    .......................................................................................................6
    P
    OWER AND
    G
    ROUND
    P
    INS
    ..........................................................................................................................................7
    R
    ESET AND
    O
    THER
    P
    INS
    ...............................................................................................................................................7
    R
    EGISTER
    0 B
    ASIC
    M
    ODE
    C
    ONTROL
    R
    EGISTER
    ............................................................................................................8
    R
    EGISTER
    1 B
    ASIC
    M
    ODE
    S
    TATUS
    R
    EGISTER
    ...............................................................................................................9
    R
    EGISTER
    2 PHY I
    DENTIFIER
    R
    EGISTER
    1....................................................................................................................9
    R
    EGISTER
    3 PHY I
    DENTIFIER
    R
    EGISTER
    2....................................................................................................................9
    R
    EGISTER
    4 A
    UTO
    -N
    EGOTIATION
    A
    DVERTISEMENT
    R
    EGISTER
    (ANAR) ....................................................................10
    R
    EGISTER
    5 A
    UTO
    -N
    EGOTIATION
    L
    INK
    P
    ARTNER
    A
    BILITY
    R
    EGISTER
    (ANLPAR)......................................................10
    R
    EGISTER
    6 A
    UTO
    -N
    EGOTIATION
    E
    XPANSION
    R
    EGISTER
    (ANER) .............................................................................11
    R
    EGISTER
    16 NW
    AY
    S
    ETUP
    R
    EGISTER
    (NSR).............................................................................................................12
    R
    EGISTER
    17 L
    OOPBACK
    , B
    YPASS
    , R
    ECEIVER
    E
    RROR
    M
    ASK
    R
    EGISTER
    (LBREMR) .................................................12
    R
    EGISTER
    18 RX_ER C
    OUNTER
    (REC) .....................................................................................................................13
    R
    EGISTER
    19 SNR D
    ISPLAY
    R
    EGISTER
    .......................................................................................................................13
    R
    EGISTER
    25 T
    EST
    R
    EGISTER
    .....................................................................................................................................13
    MII
    AND
    M
    ANAGEMENT
    I
    NTERFACE
    ..........................................................................................................................14
    Data Transition.....................................................................................................................................................14
    Serial Management...............................................................................................................................................15
    A
    UTO
    -N
    EGOTIATION AND
    P
    ARALLEL
    D
    ETECTION
    ......................................................................................................16
    Setting the Medium Type and Interface Mode to MAC.........................................................................................16
    UTP Mode and MII Interface ...............................................................................................................................16
    UTP Mode and SNI Interface ...............................................................................................................................17
    Fiber Mode and MII Interface..............................................................................................................................17
    F
    LOW
    C
    ONTROL
    S
    UPPORT
    ..........................................................................................................................................17
    H
    ARDWARE
    C
    ONFIGURATION AND
    A
    UTO
    -N
    EGOTIATION
    ............................................................................................18
    LED
    AND
    PHY A
    DDRESS
    C
    ONFIGURATION
    ................................................................................................................19
    S
    ERIAL
    N
    ETWORK
    I
    NTERFACE
    ....................................................................................................................................20
    P
    OWER
    D
    OWN
    , L
    INK
    D
    OWN
    , P
    OWER
    S
    AVING
    ,
    AND
    I
    SOLATION
    M
    ODES
    ......................................................................20
    M
    EDIA
    I
    NTERFACE
    .....................................................................................................................................................20
    100Base-TX ..........................................................................................................................................................20
    100Base-FX Fiber Mode Operation.....................................................................................................................21
    10Base-T TX/RX ...................................................................................................................................................21
    R
    EPEATER
    M
    ODE
    O
    PERATION
    .....................................................................................................................................22
    R
    ESET
    ,
    AND
    T
    RANSMIT
    B
    IAS
    ......................................................................................................................................22
    iv
    Track ID: JATR-1076-21 Rev. 1.24
    PIN DESCRIPTIONS ..........................................................................................................................................................4
    REGISTER DESCRIPTIONS ............................................................................................................................................8
    FUNCTIONAL DESCRIPTION.......................................................................................................................................14
    Single-Chip/Port 10/100 Fast Ethernet PHYceiver

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