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RTL8201CL-VD 参数 Datasheet PDF下载

RTL8201CL-VD图片预览
型号: RTL8201CL-VD
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, CMOS, PQFP48,]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 39 页 / 529 K
品牌: REALTEK [ Realtek Semiconductor Corp. ]
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RTL8201CL  
Datasheet  
Table 23. UTP Mode and MII Interface ......................................................................................................16  
Table 24. UTP Mode and SNI Interface......................................................................................................17  
Table 25. Fiber Mode and MII Interface .....................................................................................................17  
Table 26. Auto-Negotiation Mode Pin Settings ..........................................................................................18  
Table 27. LED Definitions ..........................................................................................................................19  
Table 28. Power Saving Mode Pin Settings ................................................................................................20  
Table 29. Absolute Maximum Ratings........................................................................................................23  
Table 30. Operating Conditions...................................................................................................................23  
Table 31. Power Dissipation........................................................................................................................23  
Table 32. Input Voltage: Vcc.......................................................................................................................23  
Table 33. MII Transmission Cycle Timing .................................................................................................24  
Table 34. MII Reception Cycle Timing.......................................................................................................25  
Table 35. SNI Transmission Cycle Timing .................................................................................................27  
Table 36. SNI Reception Cycle Timing ......................................................................................................28  
Table 37. MDC/MDIO Timing....................................................................................................................29  
Table 38. Crystal Characteristics.................................................................................................................30  
Table 39. Transformer Characteristics ........................................................................................................30  
Table 40. Ordering Information...................................................................................................................33  
List of Figures  
Figure 1. Block Diagram .............................................................................................................................2  
Figure 2. Pin Assignments...........................................................................................................................3  
Figure 3. Read Cycle .................................................................................................................................15  
Figure 4. Write Cycle ................................................................................................................................15  
Figure 5. LED and PHY Address Configuration.......................................................................................19  
Figure 6. MII Transmission Cycle Timing-1.............................................................................................24  
Figure 7. MII Transmission Cycle Timing-2.............................................................................................25  
Figure 8. MII Reception Cycle Timing-1..................................................................................................26  
Figure 9. MII Reception Cycle Timing-2..................................................................................................26  
Figure 10. SNI Transmission Cycle Timing-1 ............................................................................................27  
Figure 11. SNI Transmission Cycle Timing-2 ............................................................................................27  
Figure 12. SNI Reception Cycle Timing-1..................................................................................................28  
Figure 13. SNI Reception Cycle Timing-2..................................................................................................28  
Figure 14. MDC/MDIO Timing ..................................................................................................................29  
Figure 15. MDC/MDIO MAC to PHY Transmission Without Collision ...................................................29  
Figure 16. MDC/MDIO PHY to MAC Reception Without Error...............................................................30  
Single-Chip/Port 10/100 Fast Ethernet PHYceiver  
vi  
Track ID: JATR-1076-21 Rev. 1.24  
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