RTL8201CL
Datasheet
7.2.3. UTP Mode and SNI Interface
SNI interface to MAC (only operates in 10Base-T when the SNI interface is enabled)
Table 24. UTP Mode and SNI Interface
ANE
(Pin 37)
X
SPEED
(Pin 39)
X
DUPLEX
(Pin 38)
L
Operation
The duplex pin is pulled low to support the 10Base-T half duplex function.
10Base-T half duplex is the specified default mode in the SNI interface.
The RTL8201CL also supports full duplex in SNI mode. The duplex pin is
pulled high to support 10Base-T full duplex function.
X
X
H
7.2.4. Fiber Mode and MII Interface
The RTL8201CL only supports 100Base-FX when Fiber mode is enabled. ANE (Auto-Negotiation
Enable) and SPEED configuration is ignored when Fiber mode is enabled.
Table 25. Fiber Mode and MII Interface
ANE
(Pin 37)
X
SPEED
(Pin 39)
X
DUPLEX
(Pin 38)
Operation
H
L
The duplex pin is pulled high to support 100Base-FX full duplex function.
The duplex pin is pulled low to support 100Base-FX half duplex function.
X
X
7.3. Flow Control Support
The RTL8201CL supports flow control indications. The MAC can program the MII register to indicate to
the PHY that flow control is supported. When the MAC supports the Flow Control mechanism, setting
bit 10 of the ANAR register using the MDC/MDIO SMI interface, then the RTL8201CL will add the
ability to its NWay ability. If the Link partner also supports Flow Control, then the RTL8201CL can
recognize the Link partner’s NWay ability by examining bit 10 of ANLPAR (register 5).
Single-Chip/Port 10/100 Fast Ethernet PHYceiver
17
Track ID: JATR-1076-21 Rev. 1.24
REALTEK [ Realtek Semiconductor Corp. ]
