72Mbit Pipelined BSRAM
w/ NoBL Architecture
2Mx36
Preliminary Data Sheet
AC Characteristics (TA = 0°C to 70°C)
Clock
-6
-7.5
-10
Symbol
Parameter
Units
Notes
Min
6
Max
Min
7.5
2.8
2.8
Max
Min
10
Max
tCK
tCKH
tCKL
Clock Cycle Time
Clock High Time
Clock Low Time
-
-
-
-
-
-
-
-
-
ns
ns
ns
2.3
2.3
3.2
3.2
1
1
Notes:
1. This parameter is sampled and not 100% tested.
Clock and Input Timing
tCK
tCKH
tCKL
CLK
Input
Setup
Input
Hold
Input
Input Setup
-6
-7.5
-10
Symbol
Parameter
Units Notes
Min
Max
Min
Max
Min
Max
tAS
tDS
Address Setup Time
Data Input Setup Time
Clock Enable Setup Time
R/W#, BW[a:d] Setup Time
LD# Setup Time
1.5
1.5
1.5
1.5
1.5
1.5
-
-
-
-
-
-
2.0
2.0
2.0
2.0
2.0
2.0
-
-
-
-
-
-
2.0
2.0
2.0
2.0
2.0
2.0
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
tCKES
tRWS
tLDS
tCES
Chip Enable Setup Time
Enhanced Memory Systems Inc., 1850 Ramtron Dr., Colo Spgs, CO 80921
PHONE: (800) 545-DRAM; FAX: (719) 488-9095; http://www.edram.com
Copyright 2001 Enhanced Memory Systems. All rights reserved.
The information contained herein is subject to change without notice.
Revision 1.0
Page 11 of 30