Enhanced
Features
s
Memory Systems Inc.
DM512K64DT6/DM512K72DT6 Multibank EDO
EDRAM
512Kb x 64/512Kb x 72 Enhanced DRAM DIMM
Product Specification
8Kbytes SRAM Cache Memory for 12ns Random Reads Within Four
Active Pages (Multibank Cache)
s
Fast 4Mbyte DRAM Array for 30ns Access to Any New Page
s
Write Posting Registers for 12ns Random Writes and Burst Writes
Within a Page (Hit or Miss)
s
2Kbyte Wide DRAM to SRAM Bus for 113.6 Gigabytes/Second
Cache Fill Rate
s
A Hit Pin Outputs Status on On-chip Page Hit/Miss Comparators to
Simplify Control
On-chip Cache Hit/Miss Comparators Automatically Maintain Cache
Coherency on Writes
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Hidden Precharge & Refresh Cycles
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Extended 64ms Refresh Period for Low Standby Power
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CMOS/TTL Compatible I/O and +5 Volt Power Supply
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Output Latch Enable Allows Extended Data Output (EDO) for
Faster System Operation
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Description
The Enhanced Memory Systems 4MB enhanced DRAM
(EDRAM)DIMM module provides a single memory module solution
for the main memory or local memory of fast 64-bit embedded
computers, communications switches, and other high performance
systems. Due to its fast non-interleave architecture, the EDRAM DIMM
module supports zero-wait-state burst read or write operation to
83MHz. The EDRAM outperforms conventional SRAM plus DRAM or
synchronous DRAM memory systems by minimizing wait states on
initial reads (hit or miss) and eliminating writeback delays.
Each 4Mbyte DIMM module has 8Kbytes of SRAM cache
organized as four 256 x 72 row registers with 12ns initial access
time. On a cache miss, the fast DRAM array reloads an entire 2Kbyte
row register over a 2Kbyte-wide bus in just 18ns for an effective cache
fill rate of 113.6 Gbytes/second. During write cycles, a write posting
register allows the initial write to be posted as early as 5ns after
column address is available. EDRAM supports direct non-interleave
page writes at up to 83MHz. An on-chip hit/miss comparator
automatically maintains cache coherency during writes.
Architecture
The DM512K72DT6 achieves
512Kb x 72 density by mounting
nine 512Kx8 EDRAMs, packaged
in low profile 44-pin TSOP-II
packages on one side of the multi-
layer substrate. Three high drive
series terminated buffer chips
buffer address and control lines.
Twelve surface mount capacitors
are used to decouple the power
supply bus. The DM512K64DT
contains eight 512Kx8 EDRAMs.
The parity data component is not
populated.
The EDRAM memory module architecture is very similar to two
standard 2MB DRAM SIMM modules configured in a 64-bit wide,
non-interleave configuration. The EDRAM module adds an integrated
cache and cache control logic which allow the cache to operate much
like a page mode or static column DRAM.
The EDRAM’s SRAM cache is
integrated into the DRAM array as tightly
coupled row registers. Memory reads
always occur from the 256 x 72 cache
row register associated with a 1MB
segment of DRAM. When the on-chip
comparator detects a page hit, only the
/QLE
SRAM is accessed and data is available
/G
in 12ns from column address (the /HIT
I/O
output is low to indicate a page hit).
Control
DQ
and
When a page miss is detected, the entire
0-71
Data
Latches
new DRAM row is loaded into cache and
/S
data is available at the output within
30ns from row enable (the /HIT output
/WE
is high to indicate a page miss).
Subsequent reads within a page (burst
reads or random reads) will continue at
V
12ns cycle time. Since reads occur from
C
the SRAM cache, the DRAM precharge
V
can occur simultaneously without
PD
degrading performance. The on-chip
refresh counter with independent
CC
1-12
SS
Functional Diagram
CAL
0-8
Column
Add
Latch
4-Bit
Comp
A
0-7
Column Decoder
4- 256 X 72 Cache Pages
(Row Register)
Sense Amps
& Column Write Select
A
0-10
4- Last
Row
Read
Add
Latches
Row Decoder
Row
Add
Latch
Memory
Array
(4 Mbyte + Parity)
/F
W/R
/RE
Row Add
and
Refresh
Control
A
0-9
Refresh
Counter
The information contained herein is subject to change without notice.
Enhanced reserves the right to change or discontinue this product without notice.
© 1996 Enhanced Memory Systems Inc.
1850 Ramtron Drive, Colorado Springs, CO
Telephone
(800) 545-DRAM;
Fax
(719) 488-9095; http://www.csn.net/ramtron/enhanced
80921
38-2123-000
RAMTRON [ RAMTRON INTERNATIONAL CORPORATION ]
