1 Operation
The QT411 uses a SPI slave mode
interface for control and data
communications with a host
controller. Acquisition timings and
operating parameters are under host
control; there are no option jumpers
and the device cannot operate in a
stand-alone mode.
The output data is a 7-bit binary
number (0...127) indicating angular
position.
Like all QProx™ devices, the QT411
operates using bursts of
charge-transfer pulses; burst mode
permits an unusually high level of
control over spectral modulation,
power consumption, and response
time.
VIN
C1
2.2uF
Regulator
VIN
VOUT
GND
Figure 1-1 QT411 Wiring Diagram
1
VDD
C2
2.2uF
R2
100k
13
2
3
4
11
DRDY
SDO
/SS
SCLK
SDI
R1
22k
SNS3B 5
SNS3A 6
SNS2A 8
SNS2B 7
SNS1A 10
Rs5 8.2k 'RIGHT'
127
~400k
83
Cs2
100nF
Rs2 4.7k
Cs1
100nF
Rs1 4.7k
~400k
0
Rs4 8.2k 'LEFT'
~400k
45
RESISTIVE SLIDER ELEMENT
Rs3 4.7k
Cs3
100nF
SPI BUS
R3
1k
1= Detect Output
C3
1nF
12 DETECT SNS1B 9
VSS
14
The QT411 modulates its bursts in a spread-spectrum
fashion in order to heavily suppress the effects of external
noise, and to suppress RF emissions.
If power is not an issue the device can run constantly under
host control, by always raising /SS after 35µs from the last
rising edge of CLK. Constant burst operation can be used by
the host to gather more data to filter the position data further
to suppress noise effects , if required.
Synchronized mode also allows the host device to control the
rate of drift compensation, by periodically sending a ‘drift’
command to the device.
Mains Sync:
Sync mode can and should be used to sync to
mains frequency via the host controller, if mains interference
is possible (ie, running as a lamp dimmer control). The host
should issue SPI commands synchronously with the mains
frequency. This form of operation will heavily suppress
interference from low frequency sources (e.g. 50/60Hz),
which are not easily suppressed using spread-spectrum pulse
modulation.
Cross-talk suppression:
If two or more QT411’s are used in
close proximity, or there are other QTouch™ type device(s)
close by, the devices can interfere strongly with one another
to create position jitter or false triggering. This can be
suppressed by making sure that the devices do not perform
acquisition bursts at overlapping times. The host controller
can make sure that all such devices operate in distinctly
different timeslots, by using a separate /SS line for each part.
1.1 Synchronized Mode
Refer also to Figure 3-1, page 6.
Sync mode allows the host device to control the rep etition
rate of the acquisition bursts, which in turn govern response
time and power consumption.
In sync mode, the device will wait for the SPI slave select line
/SS to fall and rise and will then do an acquisition burst;
actual SPI clocks and data are optional. The /SS pin thus
becomes a ‘sync’ input in addition to acting as the SPI
framing control.
Within 35µs of the last rising edge of CLK, the device will
enter a low power sleep mode. The rising edge of /SS must
occur after this time; when /SS rises, the device wakes from
sleep, and shortly thereafter does an acquisition burst. If a
more substantial sleep time is desired, /SS should be made
to rise some delay period later.
By increasing the amount of time spent in sleep mode, the
host can decrease the average current drain at the expense
of response time. Since a burst typically requires 31ms (at
3.3V, reference circuit), and an acceptable response time
might be ~100ms, the power duty cycle will be 31/100 or 31%
of peak current.
Figure 1-2 Free-Run Timing Diagram ( /SS = high )
~31ms
Acquire Burst
<4ms
~30us
~31ms
DRDY from QT
~25ms
lQ
2
QT411-ISSG R6.01/1005
QUANTUM [ QUANTUM RESEARCH GROUP ]
