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HYS72T64000HU-3-B 参数 Datasheet PDF下载

HYS72T64000HU-3-B图片预览
型号: HYS72T64000HU-3-B
PDF下载: 下载PDF文件 查看货源
内容描述: 240针无缓冲DDR2 SDRAM模组 [240-Pin unbuffered DDR2 SDRAM Modules]
分类和应用: 动态存储器双倍数据速率
文件页数/大小: 87 页 / 5113 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYS[64/72]T[32/64/128]xx0HU-[25F/2.5/3/3S/3.7/5]-B  
Unbuffered DDR2 SDRAM Module  
3.3  
Timing Characteristics  
This chapter describes the AC Characteristics.  
3.3.1  
Speed Grade Definitions  
All Speed grades faster than DDR2-DDR400B comply with DDR2-DDR400B timing specifications(tCK = 5ns with tRAS = 40ns).  
Speed Grade Definition for: DDR2–800(Table 12), DDR2–667(Table 13), DDR2–533C(Table 14) and DDR2–400B(Table 15)  
TABLE 12  
Speed Grade Definition Speed Bins for DDR2–800  
Speed Grade  
DDR2–800D  
DDR2–800E  
Unit  
Note  
QAG Sort Name  
CAS-RCD-RP latencies  
–25F  
–2.5  
5–5–5  
6–6–6  
tCK  
Parameter  
Symbol  
Min.  
Max.  
Min.  
Max.  
1)2)3)4)  
1)2)3)4)  
1)2)3)4)  
1)2)3)4)  
1)2)3)4)5)  
1)2)3)4)  
1)2)3)4)  
1)2)3)4)  
Clock Frequency  
@ CL = 3  
@ CL = 4  
@ CL = 5  
@ CL = 6  
tCK  
5
8
5
8
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
tCK  
3.75  
2.5  
8
3.75  
3
8
tCK  
8
8
tCK  
2.5  
8
2.5  
45  
60  
15  
15  
8
Row Active Time  
Row Cycle Time  
RAS-CAS-Delay  
Row Precharge Time  
tRAS  
tRC  
tRCD  
tRP  
45  
70000  
70000  
57.5  
12.5  
12.5  
1) Timings are guaranteed with CK/CK differential Slew Rate of 2.0 V/ns. For DQS signals timings are guaranteed with a differential Slew  
Rate of 2.0 V/ns in differential strobe mode and a Slew Rate of 1 V/ns in single ended mode. Timings are further guaranteed for normal  
OCD drive strength (EMRS(1) A1 = 0)  
2) The CK/CK input reference level (for timing reference to CK/CK) is the point at which CK and CK cross. The DQS / DQS, RDQS / RDQS,  
input reference level is the crosspoint when in differential strobe mode.  
3) Inputs are not recognized as valid until VREF stabilizes. During the period before VREF stabilizes, CKE = 0.2 x VDDQ is recognized as low.  
4) The output timing reference voltage level is VTT  
.
5) RAS.MAX is calculated from the maximum amount of time a DDR2 device can operate without a refresh command which is equal to 9 x tREFI  
t
.
TABLE 13  
Speed Grade Definition Speed Bins for DDR2–667  
Speed Grade  
DDR2–667C  
DDR2–667D  
Unit  
Note  
QAG Sort Name  
CAS-RCD-RP latencies  
–3  
–3S  
4–4–4  
5–5–5  
tCK  
Parameter  
Symbol  
Min.  
Max.  
Min.  
Max.  
1)2)3)4)  
1)2)3)4)  
1)2)3)4)  
Clock Frequency  
@ CL = 3  
@ CL = 4  
@ CL = 5  
tCK  
tCK  
tCK  
5
3
3
8
8
8
5
8
8
8
ns  
ns  
ns  
3.75  
3
Rev. 1.3, 2006-12  
18  
03292006-6GMD-RSFT  
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