Data Sheet
HY[B/E]18M1G16[0/1]BF
1-Gbit DDR Mobile-RAM
Full-speed random READ accesses (Burst Length = 2, 4, 8 or 16) within a page (or pages) can be performed as shown in
Figure 17.
FIGURE 17
Random READ Accesses
CK
CK
Command
READ
READ
READ
READ
NOP
NOP
Address
BA,Col n
BA,Col x
BA,Col b
BA,Col g
CL=2
DQS
DQ
DO n
CL=3
DO n' DO x DO x' DO b DO b' DO g DO g'
DQS
DQ
DO n
DO n' DO x DO x' DO b DO b'
= Don't Care
DO n, etc. = Data Out from column n, etc.
n', x', etc. = Data Out elements, according to the programmed burst order
BA, Col n = Bank A, Column n
Burst Length = 2, 4, 8 or 16 in cases shown (if burst of 4, 8 or 16, the burst is interrupted)
Reads are to active rows in any banks
Note: This timing diagram is only applicable for the consecutive READ from the same die.
2.4.5.1
READ Burst Termination
Data from any READ burst may be truncated using the BURST TERMINATE command (see Figure 21), provided that Auto
Precharge was not activated. The BURST TERMINATE latency is equal to the CAS latency, i.e. the BURST TERMINATE
command should be issued x clock cycles after the READ command, where x equals the number of desired data element pairs.
This is shown in Figure 18.
Rev.1.0, 2007-03
27
10242006-Y557-TZXW
QIMONDA [ QIMONDA AG ]
