HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional DescriptionCommands
completion of the write burst. For the generic WRITE commands used in the following illustrations, Auto Precharge
is disabled.
#,+
T)(
T)3
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T)(
T)3
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$1
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Figure 24 Basic WRITE Timing Parameters for DQs
During WRITE bursts, the first valid data-in element is registered coincident with the WRITE command, and
subsequent data elements are registered on each successive positive edge of CLK. Upon completion of a burst,
assuming no other commands have been initiated, the DQs remain in High-Z state, and any additional input data
is ignored.
Figure 25 and Figure 26 show a single WRITE burst for each supported CAS latency setting.
Data Sheet
27
Rev. 1.71, 2007-01
05282004-NZNK-8T0D
QIMONDA [ QIMONDA AG ]
