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HYB25D512160BE-5 参数 Datasheet PDF下载

HYB25D512160BE-5图片预览
型号: HYB25D512160BE-5
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 32MX16, 0.5ns, CMOS, PDSO66, GREEN, PLASTIC, TSOP2-66]
分类和应用: 时钟动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 37 页 / 1337 K
品牌: QIMONDA [ QIMONDA AG ]
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Internet Data Sheet  
HYB25D512[40/16/80]0B[E/F/C/T](L)  
Double-Data-Rate SDRAM  
7) Reads or Writes listed in the Command/Action column include Reads or Writes with Auto Precharge enabled and Reads or Writes with  
Auto Precharge disabled.  
8) Requires appropriate DM masking.  
9) Concurrent Auto Precharge:  
This device supports “Concurrent Auto Precharge”. When a read with auto precharge or a write with auto precharge is enabled any  
command may follow to the other banks as long as that command does not interrupt the read or write data transfer and all other limitations  
apply (e.g. contention between READ data and WRITE data must be avoided). The minimum delay from a read or write command with  
auto precharge enable, to a command to a different banks is summarized in Table 13.  
10) A Write command may be applied after the completion of data output.  
TABLE 13  
Truth Table 5: Concurrent Auto Precharge  
From Command  
To Command (different bank)  
Minimum Delay with Concurrent Auto Unit  
Precharge Support  
1)  
WRITE w/AP  
Read or Read w/AP  
Write to Write w/AP  
Precharge or Activate  
Read or Read w/AP  
Write or Write w/AP  
Precharge or Activate  
1 + (BL/2) + RU(tWTR/tCK  
)
tCK  
tCK  
tCK  
tCK  
tCK  
tCK  
BL/2  
1
Read w/AP  
BL/2  
RU(CL)1) + BL/2  
1
1) RU means rounded to the next integer  
Rev. 1.70, 2007-11  
21  
03062006-PFFJ-YJY2  
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