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HYB25D256400BTL-6 参数 Datasheet PDF下载

HYB25D256400BTL-6图片预览
型号: HYB25D256400BTL-6
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX4, 0.7ns, CMOS, PDSO66]
分类和应用: 时钟动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 83 页 / 3071 K
品牌: QIMONDA [ QIMONDA AG ]
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HYB25D256[400/800/160]B[T/C](L)  
256-Mbit Double Data Rate SDRAM  
Functional Description  
Table 10  
Truth Table 4: Current State Bank n - Command to Bank m (different bank)  
Current State  
CS RAS CAS WE Command  
Action  
Notes  
1) to 6)2)3)4)5)6)  
Any  
H
X
H
X
X
H
X
X
H
X
Deselect  
NOP. Continue previous  
operation.  
1) to 6)  
1) to 6)  
L
No Operation  
NOP. Continue previous  
operation.  
Idle  
X
Any Command  
Otherwise Allowed  
to Bank m  
1) to 6)  
1) to 7)  
Row Activating,  
Active, or  
Precharging  
L
L
L
H
L
H
H
Active  
Read  
Select and activate row  
H
Select column and start  
Read burst  
1) to 7)  
L
H
L
L
Write  
Select column and start Write  
burst  
1) to 6)  
1) to 6)  
1) to 7)  
L
L
L
L
L
H
H
H
L
L
Precharge  
Active  
Read (Auto  
Precharge  
Disabled)  
H
H
Select and activate row  
Read  
Select column and start new  
Read burst  
1) to 6)  
1) to 6)  
1) to 8)  
L
L
L
L
L
H
H
H
L
L
Precharge  
Active  
Write (Auto  
Precharge  
Disabled)  
H
H
Select and activate row  
Read  
Select column and start Read  
burst  
1) to 7)  
L
H
L
L
Write  
Select column and start new  
Write burst  
1) to 6)  
L
L
L
H
H
H
L
L
Precharge  
Active  
1) to 6)  
Read (With Auto L  
H
H
Select and activate row  
1) to 7), 10)9)  
Precharge)  
L
Read  
Select column and start new  
Read burst  
1) to 7), 9), 10)  
L
H
L
L
Write  
Select column and start Write  
burst  
1) to 6)  
L
L
L
H
H
H
L
L
Precharge  
Active  
1) to 6)  
Write (With Auto L  
H
H
Select and activate row  
1) to 7), 9)  
Precharge)  
L
Read  
Select column and start Read  
burst  
1) to 7), 9)  
1) to 6)  
L
L
H
L
L
L
L
Write  
Select column and start new  
Write burst  
H
Precharge  
1) This table applies when CKE n-1 was HIGH and CKE n is HIGH (see Table 8: Clock Enable (CKE) and after tXSNR/tXSRD  
has been met (if the previous state was self refresh).  
2) This table describes alternate bank operation, except where noted, i.e., the current state is for bank n and the commands  
shown are those allowed to be issued to bank m (assuming that bank m is in such a state that the given command is  
allowable). Exceptions are covered in the notes below.  
Data Sheet  
51  
Rev. 1.21, 2004-07  
02102004-TSR1-4ZWW  
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