欢迎访问ic37.com |
会员登录 免费注册
发布采购

HYB25D256400BTL-6 参数 Datasheet PDF下载

HYB25D256400BTL-6图片预览
型号: HYB25D256400BTL-6
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 64MX4, 0.7ns, CMOS, PDSO66]
分类和应用: 时钟动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 83 页 / 3071 K
品牌: QIMONDA [ QIMONDA AG ]
 浏览型号HYB25D256400BTL-6的Datasheet PDF文件第50页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第51页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第52页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第53页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第55页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第56页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第57页浏览型号HYB25D256400BTL-6的Datasheet PDF文件第58页  
HYB25D256[400/800/160]B[T/C](L)  
256-Mbit Double Data Rate SDRAM  
Electrical Characteristics  
4
Electrical Characteristics  
4.1  
Operating Conditions  
Table 12  
Absolute Maximum Ratings  
Parameter  
Symbol  
Values  
Unit Note/ Test Condition  
min. typ. max.  
Voltage on I/O pins relative to VSS  
Voltage on inputs relative to VSS  
Voltage on VDD supply relative to VSS  
Voltage on VDDQ supply relative to VSS  
Operating temperature (ambient)  
Storage temperature (plastic)  
VIN, VOUT –0.5 —  
V
DDQ+0.5 V  
VIN  
–1.0 —  
–1.0 —  
–1.0 —  
+3.6  
+3.6  
+3.6  
+70  
+150  
V
VDD  
VDDQ  
TA  
V
V
0
°C  
°C  
W
mA  
TSTG  
PD  
-55  
Power dissipation (per SDRAM component)  
Short circuit output current  
1.5  
50  
IOUT  
Attention: Permanent damage to the device may occur if “Absolute Maximum Ratings” are exceeded. This  
is a stress rating only, and functional operation should be restricted to recommended operation  
conditions. Exposure to absolute maximum rating conditions for extended periods of time may  
affect device reliability and exceeding only one of the values may cause irreversible damage to  
the integrated circuit.  
Table 13  
Input and Output Capacitances  
Symbol  
Parameter  
Values  
Typ.  
Unit  
Note/  
Test Condition  
Min.  
1.5  
2.0  
Max.  
2.5  
Input Capacitance: CK, CK  
Delta Input Capacitance  
CI1  
pF  
pF  
pF  
pF  
pF  
pF  
TSOPII 1)  
TFBGA 1)  
3.0  
1)  
CdI1  
CI2  
0.25  
2.5  
Input Capacitance:  
All other input-only pins  
1.5  
2.0  
TFBGA 1)  
TSOPII 1)  
3.0  
1)  
Delta Input Capacitance:  
All other input-only pins  
CdIO  
0.5  
TFBGA 1)2)  
Input/Output Capacitance: DQ, DQS, DM CIO  
3.5  
4.0  
4.5  
5.0  
0.5  
pF  
pF  
pF  
TSOPII 1)2)  
1)  
Delta Input/Output Capacitance:  
DQ, DQS, DM  
CdIO  
1) These values are guaranteed by design and are tested on a sample base only. VDDQ = VDD = 2.5 V ± 0.2 V, f = 100 MHz,  
TA = 25 °C, VOUT(DC) = VDDQ/2, VOUT (Peak to Peak) 0.2 V. Unused pins are tied to ground.  
2) DM inputs are grouped with I/O pins reflecting the fact that they are matched in loading to DQ and DQS to facilitate trace  
matching at the board level.  
Data Sheet  
54  
Rev. 1.21, 2004-07  
02102004-TSR1-4ZWW  
 复制成功!