HYB18T512xxxBF–[2.5…5]
512-Mbit Double-Data-Rate-Two SDRAM
2.2
512 Mbit DDR2 Addressing
Table 9
512-Mbit DDR2 Addressing
Configuration
Bank Address
Number of Banks
Auto-Precharge
Row Address
128Mb x 41)
BA[1:0]
4
64Mb x 8
BA[1:0]
4
32Mb x 16
BA[1:0]
4
Note
—
—
A10 / AP
A[13:0]
A11, A[9:0]
11
A10 / AP
A[13:0]
A[9:0]
10
A10 / AP
A[12:0]
A[9:0]
10
—
—
Column Address
—
2)
Number of Column
Address Bits
Number of I/Os
4
8
16
—
3)
Page Size [Bytes]
1024 (1K)
1024 (1K)
2048(2K)
1) Refered to as ’org’
2) Refered to as ’colbits’
3) PageSize = 2colbits × org/8 [Bytes]
Internet Data Sheet
15
Rev. 1.05, 2007-01
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
