Internet Data Sheet
HYB18T512[40/80/16]0B[C/F]
512-Mbit Double-Data-Rate-Two SDRAM
2.2
Addressing
This chapter describes the addressing.
TABLE 10
DDR2 Addressing for ×4 Organization
Configuration
×128Mb × 41)
Note
Bank Address
BA[1:0]
4
Number of Banks
Auto-Precharge
A10 / AP
A[13:0]
A11, A[9:0]
11
Row Address
Column Address
Number of Column Address Bits
Number of I/Os
2)
3)
4
Page Size [Bytes]
1024 (1K)
1) Referred to as ’org’
2) Referred to as ’colbits’
3) PageSize = 2colbits × org/8 [Bytes]
TABLE 11
DDR2 Addressing for ×8 Organization
Configuration
×64Mb × 81)
Note
Bank Address
BA[1:0]
4
Number of Banks
Auto-Precharge
A10 / AP
A[13:0]
A[9:0]
10
Row Address
Column Address
Number of Column Address Bits
Number of I/Os
2)
3)
8
Page Size [Bytes]
1024 (1K)
1) Referred to as ’org’
2) Referred to as ’colbits’
3) PageSize = 2colbits × org/8 [Bytes]
Rev. 1.1, 2007-05
16
03292006-YBYM-WG0Z
QIMONDA [ QIMONDA AG ]
