Internet Data Sheet
HYB18T512161BF–20/22/25/28/33
512-Mbit Double-Data-Rate-Two SDRAM
Ball#/Pin#
Name
Pin
Type
Buffer
Type
Function
Data Mask ×16 organization
B3
F3
UDM
LDM
I
I
SSTL
SSTL
Data Mask Upper Byte
Data Mask Lower Byte
Power Supplies ×16 organizations
A9,C1,C3,C7,C VDDQ
PWR
–
I/O Driver Power Supply
9
A1
VDD
PWR
PWR
–
–
Power Supply
Power Supply
A7,B2,B8,D2,D VSSQ
8
A3,E3
VSS
PWR
–
Power Supply
Power Supplies ×16 organization
J2
VREF
AI
–
–
I/O Reference Voltage
E9, G1, G3, G7, VDDQ
PWR
I/O Driver Power Supply
G9
J1
VDDL
PWR
PWR
PWR
–
–
–
Power Supply
Power Supply
Power Supply
E1, J9, M9, R1 VDD
E7, F2, F8, H2, VSSQ
H8
J7
VSSDL
VSS
PWR
PWR
–
–
Power Supply
Power Supply
J3,N1,P9
Not Connected ×16 organization
A2, E2, L1, R3, NC
R7, R8
NC
–
Not Connected
Other Pins ×16 organization
K9
ODT
I
SSTL
On-Die Termination Control
TABLE 3
Abbreviations for Pin Type
Abbreviation
Description
I
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
O
I/O
AI
PWR
GND
NC
Ground
Not Connected
Rev. 1.43, 2006-11
7
03292006-L40N-L04G
QIMONDA [ QIMONDA AG ]
