HYB18H512321AF
512-Mbit GDDR3
Pin Configuration
2.4
Commands
2.4.1
Command Table
In the following table CKEn refers to the positive edge of CLK corresponding to the clock cycle when the command
is given to the Graphics SDRAM. CKEn-1 refers to the previous positive edge of CLK. For all command and
address inputs CKEn is implied.
All input states or sequences not shown are illegal or reserved.
Table 4
Operation
Command Overview
Code
CKE CKE CS RAS CAS WE BA0 BA1 BA2 A8 A2-7
Note
n-1
n
A9-11
1)
Device Deselect
DESEL
H
H
H
L
X
H
X
X
H
X
L
H
X
X
X
X
1)2)
Data Terminator
Disable
No Operation
DTERDIS H
H
H
H
L
H
X
X
X
X
X
X
X
NOP
MRS
EMRS
H
H
H
H
H
H
L
L
L
H
L
L
H
L
L
H
L
L
X
0
1
X
0
0
X
0
0
Mode Register Set
OPCODE
OPCODE
Extended Mode
Register Set
Bank Activate
1)3)
ACT
H
H
L
L
H
H
BA BA BA Row
Address
Col.
1)4)
1)4)
1)4)
1)4)
1)
Read
RD
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
H
L
X
L
H
H
H
H
L
L
L
X
H
X
L
L
L
L
L
H
H
L
X
H
X
L
H
H
L
L
L
L
H
X
H
X
H
X
BA BA BA
BA BA BA
BA BA BA
BA BA BA
BA BA BA
L
Read w/ Autoprecharge RD/A
Write WR
Write w/ Autoprecharge WR/A
Precharge
Precharge All
Auto Refresh
Power Down Mode
Entry
Power Down Mode Exit PWDNEX L
Self Refresh Entry
Self Refresh Exit
H
L
H
L
Col.
Col.
Col.
X
PRE
PREALL
AREF
1)
X
X
X
X
X
X
X
X
X
H
X
X
X
X
X
1)5)
1)6)
PWDNEN H
1)7)
1)8)
1)9)
H
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
SREFEN
SREFEX
H
L
X
X
X
1) X represents “Don’t Care”.
2) This command is invoked when a Read is issued on another DRAM rank placed on the same command bus. Cannot be in power-
down or self-refresh state. The Read command will cause the data termination to be disabled. Refer to Figure 14 for timing.
3) BA0 - BA2 provide bank address, A0 - A11 provide the row address.
4) BA0 - BA2 provide bank address, A2- A7, A9 provide the column address, A8/AP controls Auto Precharge.
5) Auto Refresh and Self Refresh Entry differ only by the state of CKE.
6) PWDNEN is selected by issuing a DESEL or NOP at the first positive CLK edge following the HIGH to LOW transition of CKE.
7) First possible valid command after tXPN. During tXPN only NOP or DESEL commands are allowed.
8) Self Refresh is selected by issuing AREF at the first positive CLK edge following the HIGH to LOW transition of CKE.
9) First possible valid command after tXSC. During tXSC only NOP or DESEL commands are allowed.
Abbreviations: BA: Bank Adress; Col.: Column Adress
Data Sheet
16
Rev. 1.73, 2005-08
05122004-B1L1-JEN8
QIMONDA [ QIMONDA AG ]
