Internet Data Sheet
HYB18H512321BF
512-Mbit GDDR3
FIGURE 7
Extended Mode Register Bitmap for Mid-Range-Speed Application
A7
A6
A5
A4
A3
A2
A1
A0
BA2
BA1
BA0
A11
A10
A9
A8
V
0
0
1
0
RFU
WR
DLL
WR
Rtt
Data Z
DLL
Enable
Output Driver
Impedance
A6
A1
A0
0
1
Enable
0
0
0
1
Autocal
35
Disable
1
1
0
1
40
45
A10 Vendor ID
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A5
A4
WR
0
1
Off
On
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
11
4
A3
A2
Termination
0
0
1
0
1
0
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RFU
0
1
0
1
0
1
5
6
ZQ / 4
ZQ / 2
7
1
1
2)
8
(Default)
9
10
There are two bitmaps for the Extended Mode Register. One bitmap shown in Figure 7 is supposed to support Mid-Speed
applications. The other bitmap shown in Figure 8 is more focused on the high-range-speed application. Both bitmaps
distinguish different numbers in supported Write Recovery clock cycles. The mid-range bit map provides WR cycles from 4 to
11.The high-speed bitmap supports WR from 7 to 13.
FIGURE 8
Extended Mode Register Bitmap for High-Speed Application
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Rev. 1.3, 2007-12
05292007-WAU2-UU95
17
QIMONDA [ QIMONDA AG ]
