Internet Data Sheet
HYB18H512321BF
512-Mbit GDDR3
FIGURE 4
Mode Register Bitmap for High-Speed Application
ꢅꢑ
ꢅꢒ
ꢅꢓ
ꢅꢔ
ꢅꢕ
ꢅꢖ
ꢅꢎ
ꢅꢌ
ꢍꢅꢖ
ꢍꢅꢎ
ꢌ
ꢍꢅꢌ
ꢌ
ꢅꢎꢎ
ꢅꢎꢌ
ꢗꢁ
ꢅꢏ
ꢅꢐ
ꢀꢁꢁ
ꢂꢃ
ꢄꢅꢆꢇꢁꢈ*ꢉ$ꢊ,
ꢍꢂ
ꢍꢁ
ꢌ
ꢗ(!*ꢉꢇꢁꢈ*ꢉ$ꢊ,
ꢅꢎꢎ ꢅꢎꢌ ꢅꢏ
ꢍ+()*ꢇꢁꢉ$ꢛ*
ꢂꢉ)*#%ꢞꢉ
#%ꢞꢉ
ꢗꢁ
ꢅꢑ
ꢅꢖ
ꢅꢎ
ꢅꢌ
ꢍꢁ
ꢔꢚ
ꢌ
ꢎ
ꢎ
ꢎ
ꢎ
ꢎ
ꢌ
ꢌ
ꢎ
ꢎ
ꢎ
ꢌ
ꢎ
ꢌ
ꢎ
ꢕꢚ
ꢔ
ꢌ
ꢌ
ꢎ
ꢎ
ꢌ
ꢎ
ꢌ
ꢎ
ꢙ%(#ꢈ"ꢚ
ꢂꢉ)*#%ꢞꢉ
ꢐ
ꢓ
ꢋꢜꢝ
ꢈ""ꢇ%* ꢉ()
ꢒ
ꢑ
ꢀꢁꢁꢇꢋꢉ)ꢉ*
ꢄꢅꢆꢇꢁꢈ*ꢉ$ꢊ,
ꢍ+()*ꢇꢂ,&ꢉ
ꢍꢂ
ꢅꢐ
ꢀꢁꢁꢇꢋꢉ)ꢉ*
ꢅꢒ
ꢅꢓ
ꢅꢔ
ꢁꢈ*ꢉ$ꢊ,
ꢅꢕ
ꢌ
ꢎ
ꢙ%ꢚ
ꢘꢉ)
ꢌ
ꢌ
ꢌ
ꢌ
ꢎ
ꢎ
ꢎ
ꢎ
ꢌ
ꢌ
ꢎ
ꢎ
ꢌ
ꢌ
ꢎ
ꢎ
ꢌ
ꢎ
ꢌ
ꢎ
ꢌ
ꢎ
ꢌ
ꢎ
ꢎꢒꢚ
ꢎꢑ
ꢎꢌ
ꢎꢎ
ꢎꢖ
ꢎꢕ
ꢎꢔ
ꢎꢓ
ꢌ
ꢎ
)ꢉ'+ꢉ$*!ꢈ"ꢚ
ꢋꢜꢝ
ꢎꢏꢈꢃꢐꢁꢑꢒꢁꢓꢔꢃꢁꢂꢕꢕꢁꢖꢃꢉꢃꢈꢁꢗꢏꢘꢘꢅꢌꢙꢁꢋꢉꢁꢉꢃꢇꢄꢚꢗꢇꢃꢅꢛꢋꢌꢍ
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢁꢊꢃꢈꢈꢋꢌꢍꢉ
FIGURE 5
Mode Register Set Timing
CLK#
CLK
Com.
PA
NOP
MRS
NOP
NOP
A.C.
NOP
RD
tMRD
tRP
tMRDR
MRS: MRS command
PA: PREALL command
A.C.: Any other command as READ
RD: READ command
Don't Care
Rev. 1.3, 2007-12
05292007-WAU2-UU95
13
QIMONDA [ QIMONDA AG ]
