P1750AE/SOS
DIFFERENCES BETWEEN THE P1750A AND P1750AE
The P1750AE achieves a 40% boost in performance (in clock cycles) over the P1750A. This reduction in clocks per
instruction is because of three architectural enhancements:
1) The inclusion of a 24 x 24 Multiply Accumulate (MAC) array.
2) A reduction in non-bus cycles to 2 clocks (bus cycles remain at 4 clocks to maintain full compatibility with the
CPU'speripheralchips).
3) Branch calculation logic.
Table 1. P1750A vs. P1750AE
# of "Clocks" Required to Execute Selected Instructions
P1750A
# of Clocks
23
P1750AE
# of Clocks
4
Instruction
Integer Multiply
Throughput Increase(1)
5.75
Compare Between Limits
Flt. Point Add/Subtract
Flt. Point Multiply
Flt. Point Compare
Convert Flt. Point To Integer
Shift Logical Left/Right
Exchange
24
28
43
6
20
18
9
1.2
1.56
4.78
1.5
4
22
9
16
6
1.38
1.5
6
4
1.5
Branch
12
8
1.5
Note:
1. Number of P1750A Clocks divided by number of P1750AE Clocks.
Table 2. P1750AE BUILT-IN FUNCTIONS
A core set of additional instructions has been included in the PACE1750AE. These instructions utilize the Built-In
Function (BIF) opcode space. The objective of these new opcodes is to enhance the performance of the 1750AE in
critical application areas such as navigation, DSP, transcendentals, and other LINPAK and matrix instructions.
Below is a list of the BIFs and their execution times (N = the number of elements in the vector being processed).
Address
Mode
Number of
Instruction
Mnemonic
Clocks
10+8N
Notes
Memory Parametric Dot Product - Single
VDPS
4F3(RA)
Interruptable
10+16N
Memory Parametric Dot Product - Double
3 x 3 Register Dot Product
Double Precision Multiply Accumulate
Polynomial
VDPD
R3DP
MACD
POLY
CLAC
STA
4F1(RA)
4F03
4F02
4F06
4F00
4F08
4F04
4F05
4F07
4F0F
4F0D
4F0E
Interruptable
6
8
7N-2
4
Clear Accumulator
Store Accumulator (32-Bit)
Store Accumulator (48-Bit)
Load Accumulator (32-Bit)
Load Accumulator Long (48-Bit)
Move MMU Page Block
7
STAL
LAC
11
9
LACL
MMPG
LTAR
LTBR
9
16+8N
Privileged
Load Timer A Reset Register
Load Timer B Reset Register
4
4
Do c um e nt # MICRO-7 REV B
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