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P1750AES-20QLMB 参数 Datasheet PDF下载

P1750AES-20QLMB图片预览
型号: P1750AES-20QLMB
PDF下载: 下载PDF文件 查看货源
内容描述: [Microprocessor, 16-Bit, 20MHz, CMOS, QFP-68]
分类和应用: 时钟外围集成电路
文件页数/大小: 22 页 / 220 K
品牌: PYRAMID [ PYRAMID SEMICONDUCTOR CORPORATION ]
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P1750AE/SOS  
SINGLE CHIP, 30MHz, ENHANCED  
SPACE PROCESSOR  
FEATURES  
Implements the MIL-STD-1750A Instruction Set  
Architecture  
Extensive Error and Fault Management and  
Interrupt Handling Capability. Built in Self Test.  
SingleChipMIL-STD-1750AEProcessor  
Two programmable Timers  
Form-Fit-Functionally Compatible with the  
P1750ACMOSProcessor  
DAIS Instruction Mix Execution Performance  
Including Floating Point Arithmetic  
1.8 MIPS at 20 MHz  
26UserAccessibleRegisters  
TTL Signal Level Compatible Inputs and  
Outputs  
Single 5V ± 10% Power Supply  
MultiprocessorandCo-processorCapability  
Available in:  
– 68-Lead Quad Pack (Leaded Chip Carrier)  
Space Radiation Tolerant  
2.25 MIPS at 25 MHz  
2.7 MIPS at 30 MHz  
BIF Instructions Allow for High Throughput  
Implementations of Transcedental Functions,  
Navigational Algorithms, and DSP Functions  
20, 25 and 30 MHz Operation over the Military  
Temperature Range (-55 to +125°c)  
- Absolute latch up immunity  
- Total Dose: > 100K Rad/Si  
- SEU Tolerance  
-10 errors per day  
< 10  
GENERAL DESCRIPTION  
user-defined instructions, using a coprocessor.  
The P1750AE/SOS is a general purpose, single chip, 16-  
bit CMOS/SOS microprocessor designed for high  
performance floating point and integer arithmetic, with  
extensiverealtimeenvironmentsupport. Itoffersavariety  
of data types, including bits, bytes, 16-bit and 32-bit  
integers, and 32-bit and 48-bit floating point numbers. It  
provides 13 addressing modes, including direct, indirect,  
indexed, based, based indexed and immediate long and  
short, and it can access 2 MWords memory.  
Thechipincludesanarrayofrealtimeapplicationsupport  
resources, such as 2 programmable timers, a complete  
interrupt controller supporting 16 levels of prioritized  
internalandexternalinterrupts,andafaultsandexceptions  
handler controlling internally and externally generated  
faults.  
TheP1750AE/SOSusesasinglemultiplexed16-bitparallel  
bus. Status signals are provided to determine whether  
the processor is in the memory or I/O bus cycle, reading  
and writing, and whether the bus cycle is for data or  
instructions.  
The P1750AE/SOS offers a well-rounded instruction set  
with 130 instruction types, including a comprehensive  
integer,floatingpoint,integer-to-floatingpointandfloating  
point-to-integer set, a variety of stack manipulation  
instructions,highlevellanguagesupportinstructionssuch  
as Compare Between Bounds and Loop Control  
Instructions. It also offers some unique instructions such  
as vectored l/O, as well as supports executive and user  
modes,andprovidesanescapemechanismwhichallows  
TheP1750AE/SOSisfabricatedusinginsulatedsubstrate  
silicononsapphiretechnologytoprovideabsoluteimmunity  
fromdestructivelatchupcausedbynaturalspaceradiation  
as well as increased total dose and SEU tollerance.  
Do c um e nt # MICRO-7 REV B  
Re vise d Aug ust 2005