PE43704
Product Specification
Figure 32. Evaluation Board Schematic
J1
HEADER16
CO_25
C0_5
2
4
1
3
VDD_DIG
C1
6
5
C2
8
7
4
5
C4
10
12
14
16
9
6
C8CLK
C16/DATA
LE
11
13
15
1
3
3
3
3
3
3
3
2
4
C4
C5
C6
C1
C7
1
2
4
100pF
100pF
100pF
C2
100pF
C3
100pF
HDR1
100pF
100pF
VDD_DIG
HEADER 1X2
1
1
1
2
4
HDR4
A0_2
A1_2
A2_2
A2_1
A1_1
A0_1
2
2
A0 VDD
A1 VDD
A2 VDD
HDR3
1
2
HEADER 1X2
DNI
HEADER3X3
1
1
R2
0OHM
R1
1
2
4
2
2
1
24
23
22
21
20
19
18
17
GND
VDD
PS
CLK
LE
VSS
1
HDR2
2
3
4
5
6
7
8
2
3
4
VDD_DIG
DNI
VDD
HEADER_4
A1
VDD
C10
100pF
C9
0.1µF
C11
C12
100pF
C8
0.1µF
U1
1
2
4
A0
A2
100pF
DSA_50OHM_5X5_MLPQ32
GND
GND
RF1
GND
VSS
GND
RF2
GND
J4
J5
Z=50 Ohm
Z=50 Ohm
142-0761-881/891
142-0761-881/891
1
1
1
2
4
DNI
R3
2
1
1
2
4
De-embeding traec
Z=50 Ohm
J10
J11
142-0761-881/891
142-0761-881/891
1
1
R4
0OHM
DOC-16527
NOTES:
1. USE PRT-13505-01 PCB.
2. CAUTION:
CONTAINS PARTS AND ASSEMBLIES SUSCEPTIBLE
TO DAMAGE BY ELECTROSTATIC DISCHARGE (ESD)
©2012-2013 Peregrine Semiconductor Corp. All rights reserved.
Document No. DOC-16514-6 |
UltraCMOS® RFIC Solutions
Page 18 of 20
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com