TISPPBL1D, TISPPBL1P, TISPPBL2D, TISPPBL2P
DUAL FORWARD-CONDUCTING P-GATE THYRISTORS
FOR ERICSSON COMPONENTS SLICS
AUGUST 1997 - REVISED DECEMBER 1999
description
The TISPPBL1 and TISPPBL2 are dual forward-conducting buffered p-gate overvoltage protectors. They are
designed to protect the Ericsson Components SLICs (Subscriber Line Interface Circuits) against overvoltages
on the telephone line caused by lightning, a.c. power contact and induction. The TISPPBLx limits voltages
that exceed the SLIC supply rail levels.
The SLIC line driver section is typically powered by a negative voltage, V
Bat
, in the region of -10 V to -85 V.
The protector gate is connected to this negative supply. This references the protection (clipping) voltage to the
negative supply voltage. As the protection voltage will track the negative supply voltage the overvoltage stress
on the SLIC is minimised. The TISPPBLx buffered gate design reduces the loading on the SLIC supply during
overvoltages caused by power cross and induction.
Positive overvoltages are clipped to ground by diode forward conduction. Negative overvoltages are initially
clipped close to the SLIC negative supply rail value. If sufficient current is available from the overvoltage, then
the protector will crowbar into a low voltage ground referenced on-state condition. As the overvoltage
subsides the high holding current of the crowbar prevents d.c. latchup. The difference between the TISPPBL1
and TISPPBL2 is the minimum value of holding current. The 105 mA TISPPBL1 can delatch SLIC
programmed line currents up to 55 mA and the 150 mA TISPPBL2 can delatch all programmed line current
values.
These monolithic protection devices are fabricated in ion-implanted planar vertical power structures for high
reliability and in normal system operation they are virtually transparent. The TISPPBLx is available in 8-pin
plastic small-outline surface mount package and 8-pin plastic dual-in-line package.
absolute maximum ratings, -40 °C
≤
T
A
≤
85 °C (unless otherwise noted)
RATING
Repetitive peak off-state voltage, I
G
= 0
Repetitive peak gate-cathode voltage, V
KA
= 0
Non-repetitive peak on-state pulse current (see Notes 1 and 2)
10/1000 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section 4)
0.2/310 µs (I3124, open-circuit voltage wave shape 0.5/700 µs)
5/310 µs (ITU-T K20 & K21, open-circuit voltage wave shape 10/700 µs)
1/20 µs (ITU-T K22, open-circuit voltage wave shape 1.2/50 µs)
2/10 µs (Bellcore GR-1089-CORE, Issue 2, December 1997, Section 4)
Non-repetitive peak on-state current, 50/60 Hz (see Notes 1 and 2)
100 ms
1s
5s
300 s
900 s
Non-repetitive peak gate current, 1/2 µs pulse, cathodes commoned (see Note 1)
Operating free-air temperature range
Junction temperature
Storage temperature range
I
GSM
T
A
T
J
T
stg
I
TSM
11
4.5
2.4
0.95
0.93
40
-40 to +85
-40 to +150
-65 to +150
A
°C
°C
°C
A
I
TSP
30
40
40
100
100
A
SYMBOL
V
DRM
V
GKRM
VALUE
-100
-90
UNIT
V
V
NOTES: 1. Initially the protector must be in thermal equilibrium with -40 °C
≤
T
J
≤
85 °C. The surge may be repeated after the device returns to
its initial conditions.
2. These non-repetitive rated currents are peak values for either polarity. The rated current values may be applied either to the Ring to
Ground or to the Tip to Ground terminal pairs. Additionally, both terminal pairs may have their rated current values applied
simultaneously (in this case the Ground terminal current will be twice the rated current value of an individual terminal pair). Above
85 °C, derate linearly to zero at 150 °C lead temperature.
PRODUCT
2
INFORMATION
POINN [ POWER INNOVATIONS LTD ]
